Three-level leadframe for no-lead packages

Abstract

A semiconductor device (700) having a leadframe with a first plurality of segments (110) having a narrow end portion (111) in a first horizontal plane (211) and a wide end portion (112) in a second horizontal plane (212). The leadframe further includes a second plurality of segments (120) having a narrow center portion (121) in the first horizontal plane, at least one wide center portion (122) in the second horizontal plane, and narrow end portions (123) in a third horizontal plane (213), which is located between the first and second planes.

Description

FIELD OF THE INVENTION [0001] The present invention is related in general to the field of semiconductor devices and processes, and more specifically to the structure and material of leadframes for integrated circuit devices. DESCRIPTION OF THE RELATED ART [0002] When the flip-chip technology is used in the assembly of semiconductor devices, in spite of its frequently higher cost compared to wire bonding, it is often required in order to meet demanding performance goals. Among these performance goals are higher numbers of input / output (I / O) terminals, shorter electrical paths for higher speed and frequency, and lower heat dissipation paths for improved thermal performance. These performance goals are driven, for instance, by the pervasive growth of semiconductor products for the wireless and computer peripheral markets. Devices with a need for high frequency performance yet low I / O count include power amplifiers and optical transceivers. [0003] In another trend in the semiconductor i...

AI Technical Summary

Benefits of technology

[0010] It is further a technical advantage of the invention that the second plurality of leadframe segments has the narrow end portions terminate in the third horizontal plane, remote from the second horizontal plane, in which the wide end portions of the first leadframe plurality are located. This feature allows a tighter segment pitch than would be feasible with an arrangement, in which all segment ends terminate in the same plane. The embodiments of the invention can thus not only accommodate low I / O counts (for example, 8 to about 100), but also intermediate I / O counts (for example, up to 200).

Problems solved by technology

When the flip-chip technology is used in the assembly of semiconductor devices, in spite of its frequently higher cost compared to wire bonding, it is often required in order to meet demanding performance goals.

Most often, however, no-lead packages are based on wire bonding technology.

Only recently have no-lead packages been proposed in the literature for flip-chip assembly; these packages are, however, only suitable for low I / O count (8 to 100 I / O's).

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