Semiconductor device and method of manufacturing the same

Abstract

Provided is a semiconductor device including a vertically oriented capacitor extending above the substrate surface and a method of manufacturing such devices in which cell, peripheral and boundary areas between the cell and peripheral areas are defined on a semiconductor substrate. Capacitors are formed in the cell area, a mold pattern is provided in the peripheral areas and an elongated dummy pattern is provided in the boundary areas. The dummy pattern includes a boundary opening in which a thin layer is formed on the elongated inner sidewalls and on the exposed portion of the substrate during formation of the lower electrode. A mold pattern and lower electrode structures having substantially the same height are then formed area so that subsequent insulation interlayer(s) exhibit a generally planar surface, i.e., have no significant step difference between the cell areas and the peripheral areas.

Description

PRIORITY STATEMENT [0001] This application claims priority under 35 U.S.C. §119 from Korean Patent Application No. 2005-50272, which was filed on Jun. 13, 2005, the disclosure of which is herein incorporated by reference in its entirety. BACKGROUND OF THE INVENTION [0002] 1. Field of the Invention [0003] The invention relates to semiconductor devices, and more particularly, to semiconductor devices comprising a higher density cell area having a plurality of capacitors including, for example, projecting lower electrodes, adjacent a lower density peripheral region and methods of manufacturing the same. [0004] 2. Description of the Related Art [0005] Due to the technical requirements associated with achieving higher degrees of integration in semiconductor devices, there has been continuing emphasis on reducing the surface area required for forming a memory cell in semiconductor memory devices. These efforts have led to difficulties in forming capacitors having a sufficient storage capa...

AI Technical Summary

Problems solved by technology

These efforts have led to difficulties in forming capacitors having a sufficient storage capacitance within the memory cell.

However, this large step difference in the second insulation interlayer 24 increases the likelihood of various processing and / or patterning defects during the manufacture of semiconductor devices that include a cylindrical capacitor.

However, the inclusion of one or more additional process steps requires additional time and increases the cost of manufacturing such semiconductor devices.

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