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Semiconductor device having boosting circuit

a technology of boosting circuit and capacitor, which is applied in the direction of power conversion systems, instruments, and apparatus without intermediate ac conversion, etc., can solve the problems of reducing the possibility of internal circuit supply unnecessarily high voltage, reducing the overall drop in the internal power supply voltage, and reducing the power consumption of the resistor

Inactive Publication Date: 2014-04-24
ELPIDA MEMORY INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The present invention aims to provide a circuit that can maintain a stable voltage even when the external power supply voltage changes. This is achieved by controlling the resistance value of a variable resistor based on the external power supply voltage and a reference voltage. This helps to reduce power consumption by the resistor. Additionally, the invention eliminates the need for a larger smoothing capacitor which can save surface area on the circuit.

Problems solved by technology

However, a larger capacitor requires a larger surface area.
The insertion of the resistor causes a voltage drop due to resistance, and thus there is a reduced possibility of the internal circuits being supplied unnecessarily high voltages.
However, insertion of a resistor on the output side of the boosting circuit leads to an overall drop in the internal power supply voltage.
Particularly when there is a drop in the external power supply voltage, an adequate internal power supply voltage may not be derived.
Furthermore, the resistor consumes power, which is not preferable from the point of view of reduction of power consumption.

Method used

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  • Semiconductor device having boosting circuit
  • Semiconductor device having boosting circuit
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first embodiment

[0033]FIG. 1 is a schematic diagram indicating a functional block of a semiconductor device 1a according to the present invention.

[0034]The semiconductor device 1a, for example, is a semiconductor memory device such as a DRAM, a FLASH memory, and a PRAM (Phase change Random Access Memory). As shown in FIG. 1, the semiconductor device 1a includes a boosting circuit 10a, a variable resistor circuit 20a, an external voltage-level comparison circuit 21a, a capacitor 22, and an internal circuit 30. The semiconductor device 1a includes a power supply terminal 2 that serves as an external terminal and to which an external power supply voltage VDD is supplied. The semiconductor device 1a includes other types of terminals such as a command terminal, an address terminal, and a data input and output terminal; however, explanations of these terminals will be omitted.

[0035]The boosting circuit 10a and the external voltage-level comparison circuit 21a are connected to the power supply terminal 2 ...

second embodiment

[0082]FIG. 7 is a schematic functional block diagram of a semiconductor device 1b according to the present invention.

[0083]As shown in FIG. 7, the semiconductor device 1b according to the second embodiment differs from the semiconductor device 1a according to the first embodiment in that it includes a boosting circuit 10b, a variable resistor circuit 20b, and an external voltage-level comparison circuit 21b instead of the boosting circuit 10a, the variable resistor circuit 20a, and the external voltage-level comparison circuit 21a. Moreover, a voltage at the output node b in the second embodiment is called an internal power supply voltage VPP. The parts of the second embodiment that are different from the first embodiment are mainly explained below.

[0084]The boosting circuit 10b differs from the boosting circuit 10a in that it includes an OSC circuit 11b instead of the OSC circuit 11a, and in addition, also includes an OSC control circuit 13. The boosting circuit 10b stops a boostin...

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Abstract

A semiconductor device includes a boosting circuit that boosts an internal power supply voltage in a boosting range according to an external power supply voltage, an external voltage-level comparison circuit that compares the external power supply voltage and a predetermined reference voltage, and a variable resistor circuit that includes a variable resistor connected to an output terminal of the boosting circuit. The variable resistor circuit controls a resistance value of the variable resistor based on a comparison result of the external voltage-level comparison circuit.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS[0001]This application is a Continuation application of U.S. patent application Ser. No. 13 / 064,237, filed on Mar. 11, 2011.[0002]This application is based on and claims priority from Japanese Patent Application No. 2010-055606 filed on Mar. 12, 2010. The disclosure thereof is incorporated herein by reference in its entirety.BACKGROUND OF THE INVENTION[0003]1. Field of the Invention[0004]The present invention relates to a semiconductor device, and, more particularly relates to a semiconductor device that prevents an internal power supply voltage from exceeding a tolerance value.[0005]2. Description of Related Art[0006]In semiconductor devices such as a DRAM (Dynamic Random Access Memory) and a FLASH memory, a boosting circuit is used for generating an internal power supply voltage from an external power supply voltage (see, for example, Japanese Patent Application Laid-open No. 2008-79493). The internal power supply voltage generated by the boo...

Claims

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Application Information

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Patent Type & Authority Applications(United States)
IPC IPC(8): G05F1/46
CPCG05F1/46G11C5/145H02M1/15H02M3/07H02M1/0045
Inventor FUJISAWA, HIROKIKUBOUCHI, SHUICHITANAKA, HITOSHI
Owner ELPIDA MEMORY INC
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