6results about How to "Improve ripple" patented technology

The gallium nitride-based compound semiconductor laser chip comprises a substrate, a lower limiting layer, a lower waveguide layer, an active layer, an upper waveguide layer and an upper limiting layer which are sequentially arranged from bottom to top, a hyperbolic polariton layer is arranged between the lower limiting layer and the lower waveguide layer, and breakdown field intensity distribution in the hyperbolic polariton layer is designed. And a breakdown field strength relationship among the lower limiting layer, the lower waveguide layer and the hyperbolic polariton layer. The performance of the semiconductor laser chip can be improved.

The utility model discloses an output voltage regulation circuit and a switching power supply, and the output voltage regulation circuit comprises a voltage division circuit which comprises a first voltage division device and a second voltage division device, one end of the first voltage dividing device is connected with the output end of the switching power supply, the other end of the first voltage dividing device is connected with one end of the second voltage dividing device and then connected with the reference end of the TL431, and the other end of the second voltage dividing device is used for being connected with the signal ground of the switching power supply; the digital adjusting circuit is connected with the second voltage dividing device in parallel and comprises a switching device and an energy storage device, the control end of the switching device is used for inputting a controllable duty ratio signal, and the charging, discharging and open-circuit states of the energy storage device can be changed by changing the duty ratio of the duty ratio signal, so that the energy storage device can be switched on or switched off. Therefore, the magnitude of the output voltage of the switching power supply is adjusted. A production end is easy to operate, and ripple and dynamic performance are good.

The invention relates to an electronic device and a method of manufacturing the electronic device. The electronic device includes: a display panel including a base layer including a first region and a second region surrounding the first region, a pixel overlapping the second region on the base layer, and an encapsulation layer covering the pixel, the encapsulation layer including a first electrode, a second electrode, and a second electrode; and the encapsulation layer is provided with a module hole defined through the encapsulation layer and overlapping the first region; a capping layer including an organic material and on the display panel; an anti-reflection layer on the capping layer; an electronic module overlapping the module hole; and a window on the anti-reflection layer, in which the first region includes a dam region adjacent to the second region and surrounding the module hole, and an edge region between the module hole and the dam region, and the cover layer overlaps the dam region and the second region and the cover layer is spaced apart from the edge region.

The utility model discloses a low-ripple and low-harmonic power supply charger. The internal circuit comprises a commercial power input and over-current protection circuit, an EMI filtering electromagnetic anti-interference circuit, a harmonic improvement circuit, a rectification filter circuit, a PWM control IC and MOSFET tube driving circuit, a high-frequency transformer conversion circuit, an output rectification filter circuit, an MCU protection and charging control circuit, a loop control circuit, a load short circuit prevention and reverse insertion circuit and an output low ripple and EMI circuit. According to the lead-acid battery power supply charger of the utility model, the EMI filtering electromagnetic anti-interference circuit, the harmonic improvement circuit, the output rectification filter circuit and the output low ripple and EMI circuit are designed, and the high-frequency transformer is adopted, so that the power supply charger is provided with a multi-stage ripple and harmonic suppression circuit, and therefore, ripple and harmonic generated in the charger can be improved and suppressed; working stability and power supply efficiency of the power supply charger are ensured.

A novel tapless resonant push-pull photovoltaic energy storage inverter topology is disclosed, relating to the field of energy storage system topology control technology, specifically a novel tapless resonant push-pull photovoltaic energy storage inverter topology. It includes a photovoltaic boost MPPT circuit, a DC-AC bidirectional inverter circuit, and a battery-side DC-DC tapless resonant push-pull bidirectional isolated charging circuit. The photovoltaic boost MPPT circuit is used to increase the DC voltage of the photovoltaic panels and perform maximum power point tracking control. The DC-AC bidirectional inverter circuit performs bidirectional DC-to-AC conversion through three independent T-type three-level circuits, each independently controlled, with low harmonic output current. The battery-side DC-DC tapless resonant push-pull bidirectional isolated charging circuit includes a tapless transformer and a push-pull circuit. Through innovative tapless resonant push-pull circuit, dual-transformer interleaved control technology, and three-level inverter circuit design, it achieves efficient power conversion, optimized battery charge and discharge management, and reduced high-frequency ripple and electromagnetic interference, thereby improving the overall efficiency, stability, and reliability of the photovoltaic energy storage system.

This invention discloses a unified vector timing construction method for ripple optimization of multi-parallel converters. This method constructs a near-three-voltage vector set based on a reference voltage and generates a basic vector sequence library by progressively varying the total number of conducting switching devices in parallel branches, forming a unified modulation framework applicable to any number of parallel converters. Based on the basic vector sequence library, a symmetrical vector timing unit is constructed, and by repeatedly expanding this basic unit, a complete vector timing sequence applicable to any number of parallel converters is formed. Furthermore, the switching timing sequence of each parallel branch is determined based on the complete vector timing sequence. Two types of triangular carrier initial angle configuration schemes and two complementary modulation waves and their corresponding operating modes are proposed to generate the switching timing sequence of each parallel branch. This method optimizes output current ripple while providing modulation degrees of freedom for optimizing other performance indicators.