93results about How to "Ripple Elimination" patented technology

The configurations of an interleaved flyback converter and a controlling method thereof are provided. The proposed two-phase interleaved flyback converter includes a transformer including a first primary winding having a first terminal, a first secondary winding having a first terminal, a second primary winding having a second terminal, a second secondary winding having a second terminal and a magnetic coupled core device, wherein the first primary, the first secondary, the second primary and the second secondary windings are wound therein, and the first terminal of the first primary winding has a polarity the same as that of any of the first terminal of the first secondary winding, the second terminal of the second primary winding and the second terminal of the second secondary winding so as to eliminate a ripple of a channel current of the converter.

A field effect transistor (FET) driver circuit includes an error amplifier for providing a FET control signal and a current limiting amplifier for preventing excessive current flow through the FET. The current limiting amplifier generates an overcurrent signal when an excessive current is detected. In response to the overcurrent signal, a voltage control circuit adjusts the voltage at the output of the error amplifier to turn off the FET. Meanwhile, a pulldown circuit at an input of the error amplifier adjusts the voltage provided to that input to cause the error amplifier to provide an output voltage that also tends to turn off the FET. If a buffer is present at that input to the error amplifier, a second pulldown circuit is placed at the input to the buffer to maintain a stable unity gain across the buffer.

The invention discloses a dual-frequency receiving antenna and a dual-frequency rectifying antenna. The dual-frequency receiving antenna and the dual-frequency rectifying antenna are used for solving the problems that an existing dual-frequency receiving antenna is large in size and small in gain, an existing dual-frequency rectifying antenna is large in size, can not receive weak energy and is not suitable for remote transmission, and a rectifying circuit is poor in reliability. The dual-frequency receiving antenna comprises a rectangular radiating patch. A Z-type groove used for achieving dual-frequency characteristics is formed in the radiation patch. The lower end of the radiation patch is sequentially connected with a dielectric substrate layer and a metal earth plate through a coaxial line. The coaxial line is in circuit connection with the rear end of the radiation patch. An air dielectric layer is formed between the radiation patch and the dielectric substrate layer. The portions, arranged between the radiation patch and the dielectric substrate layer, outside the coaxial line are provided with metal sheets in a bilaterally-symmetric mode. The upper ends of the metal sheets are connected with the radiation patch. The lower ends of the metal sheets are connected with the dielectric substrate layer. One end face of the radiation patch is further connected with the metal sheets connected with the dielectric substrate layer. The dual-frequency receiving antenna and the dual-frequency rectifying antenna can be widely applied in the fields of communication, medical treatment, industry and the like, for microwave power transmission.

This invention belongs to the machinery processing technology, it relates to the improvement of the bending and machining method of the tubing especially to the thin-wall tubing or the similar thin-wall part. The low-melting alloy in this invention, whose proportion by weight of the component contents is as following: Lead 25- 32%, tin 12- 15%, cadmium 9- 13%, zinc 0- 4%, stibium 0- 5%, bismuth margin. The low-melting alloy can ensure the request of ellipse degree of the pipe after processing, and it can eliminate cockles, corrugation.

A speed controller includes a speed integration compensation low-pass filter, an integral control system, a proportional control system, and a multiplication device 134. The speed integration compensation low-pass filter has a transfer function corresponding to a delay of a speed control system. The integral control system 136 is multiplied by an integral gain by a multiplier and integrated by a speed integrator before being supplied to an adder. The adder adds an output of the proportional control system and an output of the integral control system and outputs the result to the multiplier, which in turn multiplies the output of the adder by a proportional gain and outputs the result as a torque command. The multiplication means multiplies the output of the integral control system and the output of the proportion control system by a speed proportional gain and outputting the value of the torque command.

Disclosed is a linear motor which comprises a magnet unit, a coil unit, a magnet fixing seat and a control system. The magnet fixing seat is laterally U-shaped. The magnet unit includes a first magnet array and a second magnet array which are respectively disposed on two parallel inner walls of the magnet fixing seat. The coil unit is arranged in a magnetic gap between the two magnet arrays. The control system is used for supplying current to the coil unit. The two magnet arrays are periodically and alternately distributed along a Y direction according to a Halbach array mode. The coil unit includes a first coil array and a second coil array which is disposed along a Z direction perpendicular to the Y direction and is adjacent to the first coil array, and the two coil arrays are staggered by a certain distance delta P along the Y direction. A platform device adopting the linear motor is further disclosed. According to the invention, magnetic leakage can be reduced, greater thrust can be provided, and a double-layer coil arrangement structure is adopted to enable the linear motor to generate required three-degree-of-freedom control force or control torque.

A multi-thread single-line chain stitch line, consisting of at least three threads. This method provides for the formation of variable structures of stitches, based on varying sequences for the conjoining of several top threads, loaded to their individual needles, with several bottom threads, loaded to their individual loopers. The method suggests intertwining top threads between each other. The proposed stitch structure provides homogeneity of mechanical stresses in the stitch line, resulting in higher strength and durability. The machine to provide such stitch line comprises a revolver, bringing required needles to the operation point and intertwining threads during formation of the stitch line, and likewise comprising a revolver for bringing required loopers to the operation point. In one of the embodiments of the present invention, only three top threads are used, with the looper having no bottom thread loaded in it.

A semiconductor device includes a boosting circuit that boosts an internal power supply voltage in a boosting range according to an external power supply voltage, an external voltage-level comparison circuit that compares the external power supply voltage and a predetermined reference voltage, and a variable resistor circuit that includes a variable resistor connected to an output terminal of the boosting circuit. The variable resistor circuit controls a resistance value of the variable resistor based on a comparison result of the external voltage-level comparison circuit.

Torque ripple of a motor due to a rotation detection device is reduced. A periodicity gain multiplier 51 multiplies the rotation angle θ of a detection target by a ripple periodic number m per rotation of the detection target. An adder 53 adds a phase adjusting value “ψ” from a phase adjustor 49 to the value “mθ”. The value “sin(mθ+ψ)”, which is calculated by a sine calculator 55, is multiplied by a predetermined gain G by an amplitude adjustor 57 and by the angular velocity ω of the detection target by a multiplier 59. A subtractor 61 subtracts the output of the multiplier 59 from the value “ω” and outputs “ω(1⁻Gsin(mθ+ψ))”. The output of the subtractor 61 and the output “mθ+ψ” of the adder 53 are input to the phase adjustor 49 and amplitude adjustor 57. The phase adjustor 49 calculates the phase adjusting value “ψ” based on the summation of the derivative values of the outputs from the subtractor 61sampled for each “π/2” of the output from the adder 53. The amplitude adjustor 57 calculates the gain G based on the summation of the differences between averages of the sampled values at “0” and “π” of the output of the adder 53 and averages of the time integration value at the integral interval of “0” to “π”.

A technique is provided that identifies screen and non-screen regions of a projected or displayed image to smooth and selectively remove moiré from the screen regions while maintaining sharpness in the non-screen regions. Each pixel in the image is classified as a screen or non-screen pixel and then pixels in a predetermined surrounding area of each pixel are examined to check the classification of that pixel. A low pass filter is applied to pixels in the image, such that, when the low pass filter is applied, one or more pixels covered by the low pass filter are respectively replaced by one or more other pixels covered by the low pass filter based on the examination.

An AC-DC power supply circuit utilizing an output stage configuration designed to achieve no output ripple at the power line frequency. To eliminate the ripple formed, each separate processing output stage corresponding to a respective ac voltage source phase which provides a 120 Hz ripple, is stacked, in a series connection, and due to their respective ripple phase shifts of 120° degrees, achieves ripple cancellation at the output.

The invention discloses a switch converter comprising a main transistor, and a controller and control method of the switch converter. The controller comprises a clock generation circuit and a control circuit. The clock generation circuit generates a clock signal deciding the switch frequency of the main transistor. The control circuit is coupled to the clock generation circuit and generates a control signal according to the clock signal and a feedback signal representing the output signal of the switch converter to control the main transistor. The clock generation circuit is further coupled to the control circuit to receive the control signal and judges whether the on time of the main transistor is smaller than a time threshold value according to the control signal. If the on time of the main transistor is smaller than the time threshold value, the clock generation circuit changes the frequency of the clock signal to adjust the on time of the main transistor to be equal to the time threshold value.

A driving power control circuit and method for light emitting diodes (LEDs) are provided. The driving power control circuit includes a plurality of switch units and a control unit. Each switch unit is electrically coupled to one LED string whose end generates node voltage. The control unit includes a voltage selecting module, a subtractor, and an adjusting module. The voltage selecting module is electrically coupled to the node voltages and outputs one of the node voltages as a reference node voltage. The subtractor is electrically coupled to an output terminal of the voltage selecting module and generates a corresponding feedback voltage according to the reference node voltage and the node voltage. The adjusting module is electrically coupled to an output terminal of the subtractor and outputs a corresponding adjusting signal according to the feedback voltage to determine whether the corresponding switch unit is turned on.

The invention provides a switching power supply feedback control circuit and a single-stage PFC efficient constant current power supply drive circuit. The invention discloses a switching power supply feedback control circuit for constant-current and constant-voltage ripple elimination and a high-power factor frequent-flashing free constant-current and constant-voltage drive circuit based on a single-stage PFC chip. The switching power supply feedback control circuit includes a voltage stabilization reference module, a constant current module, a constant voltage feedback module, and a protection module, the voltage stabilization reference module supplies stable and reliable reference voltage source for the non-inverting input ends of the constant current module and the constant voltage feedback module, the constant current module adjusts the circuit current to make the circuit output current constant based on the reference voltage source of the voltage stabilization reference module, the constant voltage feedback module is connected with a PWM control circuit of a primary end and is cooperated with the constant current module to adjust the output voltage, so that the circuit output voltage is constant, and the protection module stabilizes and protects the output voltage. The switching power supply feedback control circuit can solve the problems that the LED drive in the prior art is large in size, high in cost, low in PF value, large in ripple, and frequent in flashing and harmful to eyes, and according to the invention, the LED drive at all power levels within 150W can be covered.

The invention provides a method to reduce phase shake in clock recovering system and the equipment. The clock recovering system has a phase detector to detect the phase difference between an input signal and a clock signal output by a voltage controlled oscillator, generates a rising pulse and a descending pulse according to the phase difference, and uses the two pulses to generate a control voltage of the voltage controlled oscillator. It uses a time delay component to make the two pulses overlap in the time field, to eliminate the ripple generated on the control voltage, so as to prevent the clock signal from producing phase shake.

An oscillation detection circuit is constituted by at least one circuitry comprising a first current source for charging a capacitor and a second current source for discharging the capacitor, which are connected in series via a switch controlled to be opened or closed in response to an output signal of an oscillation circuit, wherein the first current source is greater than the second current source in current value. Herein, a signal emerging at a connection point of the first and second current sources is integrated as the switch is repeatedly turned on and off in response to the oscillation signal whose level is periodically changed in an oscillation mode. A Schmitt trigger is arranged to produce a detection signal based on the signal at the connection point between the first and second current sources.

The invention discloses a voltage sag severity grade judgment method. The method comprises the steps that a single-phase analysis method is adopted to detect whether a power grid has voltage sag; theregion of the current voltage sag in a tolerance curve graph of general equipment is judged according to voltage sag lasting time and voltage sag amplitude, wherein if the current voltage sag is in anequipment normal work region, first-grade severity is judged; if the current voltage sag is in an equipment fault region, extreme severity is judged; and if the current voltage sag is in a to-be-assessed region, weight coefficients of the voltage sag lasting time and the voltage sag amplitude are further calculated respectively; a weighted Euclidean distance of the current voltage sag from the equipment normal work region of the tolerance curve is calculated according to the weight coefficients; and the weighted Euclidean distance is compared with each preset voltage sag severity grade threshold to determine the severity grade of the voltage sag. Through the method, voltage sag detection speed and severity grading precision can be improved, and it is convenient to reasonably access sag severity.

The invention discloses a power converter controlled series circuit and a control method thereof and a power system. The series circuit comprises: a capacitor having a first port A and a second port;a power converter, a first output port of the power converter being connected to a second port of the capacitor, a second output port of the power converter being a port B, and the power converter being used for outputting an auxiliary voltage; and a controller used for controlling the power converter to output auxiliary voltage according to the selected function; wherein the series circuit can beexpressed as an equivalent capacitor, inductor or impedor according to the selected function. The auxiliary voltage can basically eliminate low-frequency alternating-current voltage ripples at the two ends of the capacitor, so that basically pure direct-current output voltage is output to a load.