Electronic device and method of manufacturing electronic device, and electronic apparatus

Abstract

An electronic device of the technology includes: a plurality of first wiring patterns that are electrically coupled to each other partially, and each extend in a first direction; an organic insulating layer that is provided on the first wiring patterns; and a second wiring pattern that is provided on the organic insulating layer.

Description

TECHNICAL FIELD[0001]The technology relates to an electronic device having a structure in which a plurality of wiring patterns are laminated with an organic insulating layer interposed between, to a method of manufacturing such an electronic device, and to an electronic apparatus that includes such an electronic device.BACKGROUND ART[0002]In recent years, in an electronic device, the number of wiring patterns has been increased to improve the performance thereof, and circuits have become complex accordingly. In particular, in a display device used for an organic EL (Electroluminescence) display unit or any other display unit, circuits thereof have become more complex due to a large number of thin-film transistors (TFTs) and wiring circuits as well as an increase in the area of a capacitor, or any other reason.[0003]Moreover, in the organic EL display unit, a further increase in size of a display region and higher definition have been desired. When the display region is made larger i...

AI Technical Summary

Benefits of technology

[0028]2. Application Examples (examples of electronic apparatuses each provided with the electronic device)

[0029]FIG. 1 illustrates a perspective view of a cross-sectional configuration of an electronic device (an electronic device 1) according to an embodiment of the disclosure. In the electronic device, a lower-layer wiring pattern 2 (a first wiring pattern) and an upper-layer wiring pattern 4 (a second wiring pattern) are laminated with an organic insulating layer 3 interposed between. The plurality of lower-layer wiring patterns 2 are provided on a substrate 11. The lower-layer wiring patterns 2 are disposed in such a manner that the lower-layer wiring patterns 2 are electrically coupled to each other partially, and each extend in one direction, for example, X-axis direction (a first direction). FIG. 2 illustrates a cross-sectional configuration of a display unit (a display unit 1A) that includes a display device that is an example of the electronic device 1 illustrated in FIG. 1. The display unit 1A may be used as, for example, an organic EL television apparatus or any other apparatus, and is provided with a display region 110A on the substrate 11 as illustrated in FIG. 3. Inside the display region 110A, a plurality of pixels (red pixels 5R, green pixels 5G, and blue pixels 5B) are arrayed in a matrix pattern. Further, at a peripheral region 110B located at the periphery (outer edge side or outer circumferential side) of the display region 110A, there are provided a signal line driving circuit 120 and a scan line driving circuit 130 that are drivers for image display (peripheral circuits 12B to be hereinafter described).

[0030]Inside the display region 110A, a pixel driving circuit 140 is provided. FIG. 4 illustrates an example of the pixel driving circuit 140 (an example of pixel circuits of the red pixel 5R, the green pixel 5G, and the blue pixel 5B). The pixel driving circuit 140 is an active-type driving circuit that is provided in a lower layer of a pixel electrode 31 to be hereinafter described. The pixel driving circuit 140 includes a drive transistor Tr1, a write transistor Tr2, and a capacitor (a holding capacitor) Cs between the drive transistor Tr1 and the write transistor Tr2. Further, the pixel driving circuit 140 also includes a light-emitting element 10 that is coupled in series to the drive transistor Tr1 between a first power supply line (Vcc) and a second power supply line (GND). In other words, inside each of the red pixel 5R, the green pixel 5G, and the blue pixel 5B, there is provided the corresponding light-emitting element 10 (corresponding one of a red light-emitting element 10R, a green light-emitting element 10G, and a blue light-emitting element 10B, or a white light-emitting element 10W (not illustrated)). Each of the drive transistor Tr1 and the write transistor Tr2 is configured of a typical TFT, and a configuration thereof is not limited specifically. That is, the configuration thereof may be of an inversely-staggered structure (a so-called bottom-gate type) or may be of a staggered structure (a so-called top-gate type), for example.

[0031]In the pixel driving circuit 140, a plurality of signal lines 120A are disposed in a column direction, and a plurality of scan lines 130A are disposed in a row direction. A crossover point between each of the signal lines 120A and each of the scan lines 130A corresponds to any one of the red pixel 5R, the green pixel 5G, and the blue pixel 5B. Each of the signal lines 120A is coupled to the signal line driving circuit 120, and an image signal is supplied to a source electrode of the write transistor Tr2 via the signal line 120A from the signal line driving circuit 120. Each of the scan lines 130A is coupled to the scan line driving circuit 130, and scan signals are sequentially supplied to a gate electrode of the write transistor Tr2 via the scan line 130A from the scan line driving circuit 130.

[0032]In the display region 110A of the display unit 1A, as illustrated in FIG. 2, a semiconductor layer 20 and a display layer 30 are laminated in this order on the substrate 11. The semiconductor layer 20 has a multi-layered wiring pattern structure in which, in addition to a wiring pattern layer 25 that includes a wiring pattern layer 21 including a gate electrode 21A, a channel layer 23, and a pair of source-drain electrodes (a source electrode 25A and a drain electrode 25B), etc. or any other layer as a wiring pattern layer, a wiring pattern layer 27 is laminated on the wiring pattern layer 25 with an interlayer insulating film 26 made of an organic material interposed between.

[0033]Each of the transistors Tr1 and Tr2, the signal lines 120A, the scan lines 130A, and the power supply lines (Vcc and GND) in the display unit 1A may be configured of, for example, any of wiring patterns including the wiring pattern layers 21, 25, and 27, as well as the channel layer 23. FIG. 5 and FIG. 6 are each an example of a specific wiring layout of the transistors Tr1 and Tr2, the signal lines 120A, the scan lines 130A, and the power supply lines (Vcc and GND). In the present embodiment, for example, the scan line 130A and Vcc in FIG. 5 may correspond to the lower-layer wiring pattern 2 illustrated in FIG. 1, and the scan line 130A and Vcc are provided in the wiring pattern layer 25 in this example. Further, the signal line 120A and GND may correspond to the upper-layer wiring pattern 4 illustrated in FIG. 1, and the signal line 120A and GND are provided in the wiring pattern layer 27 in this example. It is to be noted that the plurality of upper-layer wiring patterns 4 that are provided on the organic insulating layer 3 may also preferably extend in one direction, for example, a Y-axis direction (a second direction) similarly to the lower-layer wiring patterns 2 for the reason to be hereinafter described.

Problems solved by technology

However, in the method mentioned in PTL 2, although superior insulating property has been achieved in disconnecting and repairing a short-circuit part in wiring patterns that are provided on an upper layer of the organic resin layer (on the organic resin layer), it has been difficult to achieve the intended insulating property for wiring patterns that are provided in a lower layer of the organic resin layer.

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