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Rupture control device and semiconductor device to improve yield

a control device and semiconductor technology, applied in the field of rupture control devices and semiconductor devices, can solve the problems of increasing the probability of defective cells occurring and the yield inevitably falling, and achieve the effect of reducing the number of unnecessary rupture operations

Active Publication Date: 2017-12-21
SK HYNIX INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

The patent describes a device that can control when a fuse is ruptured, reducing unnecessary operations. This can be used in semiconductor devices.

Problems solved by technology

When a defect occurs in any one of the memory cells, the semiconductor memory device is discarded because the semiconductor memory device cannot perform a normal operation.
The increase in integration density and operating speed of the semiconductor memory device raises the probability that a defective cell will occur.
When defective cells are likely to occur, the yield inevitably decreases.

Method used

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  • Rupture control device and semiconductor device to improve yield
  • Rupture control device and semiconductor device to improve yield
  • Rupture control device and semiconductor device to improve yield

Examples

Experimental program
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Embodiment Construction

[0018]Hereinafter, a rupture control device and a semiconductor device including the same according to the present disclosure will be described below with reference to the accompanying drawings through exemplary embodiments.

[0019]FIG. 1 is a configuration diagram of a semiconductor device according to an embodiment.

[0020]As illustrated in FIG. 1, a rupture control device 100 according to the present embodiment includes an address control circuit 101, a read control circuit 140, a comparison circuit 150, a rupture control circuit 160, a fuse array 170, and a normal cell array 200. The address control circuit 101 includes a counter control circuit 110, a rupture counter 120 and a rupture address generation circuit 130.

[0021]The rupture control device 100 controls a rupture operation of the fuse array 170 during a repair operation. For this operation, the address control circuit 101 controls whether to activate a rupture address RADD in response to a first rupture command signal RUP_CM...

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Abstract

A rupture control device may include an address control circuit configured to generate a rupture address in response to a first rupture command signal, a rupture mask signal and an external address, wherein the rupture address is generated according to whether the rupture mask signal is activated, and wherein an address and fuse data are compared, and a rupture mask signal indicating whether a fuse is ruptured is determined. Further, a fuse array configured to perform a rupture operation in response to the rupture address when a rupture enable signal is activated, and output the fuse data in response to a read enable signal.

Description

CROSS-REFERENCES TO RELATED APPLICATION[0001]The present application claims priority under 35 U.S.C. §119(a) to Korean application number 10-2016-0074490 , filed on Jun. 15, 2016, in the Korean Intellectual Property Office, which is incorporated herein by reference in its entirety.BACKGROUND1. Technical Field[0002]Various embodiments relate to a rupture control device and a semiconductor device including the same, and more particularly, to a technology for performing a repair operation using a fuse.2. Related Art[0003]DRAM (Dynamic Random Access Memory) involves a plurality of memory cells arranged in a matrix shape. When a defect occurs in any one of the memory cells, the semiconductor memory device is discarded because the semiconductor memory device cannot perform a normal operation. The increase in integration density and operating speed of the semiconductor memory device raises the probability that a defective cell will occur.[0004]The yield of DRAM may be expressed as the rati...

Claims

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Application Information

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IPC IPC(8): G11C29/00G11C17/18G11C17/16
CPCG11C29/78G11C17/18G11C17/16G11C29/808G11C29/785G11C29/787G11C29/027
Inventor KIM, KWI DONG
Owner SK HYNIX INC