Processor and method for using an instruction hint to prevent hardware prefetch from using certain memory accesses in prefetch calculations

Abstract

A microprocessor includes a cache memory, a prefetch unit, and detection logic. The prefetch unit may be configured to monitor memory accesses that miss in the cache and to determine whether to prefetch one or more blocks of memory from a system memory based upon previous memory accesses. The prefetch unit may be further configured to use addresses of the memory accesses that miss to calculate each next memory block to prefetch. The detection logic may be configured to provide a notification to the prefetch unit in response to detecting a memory access instruction including a particular hint. In response to receiving the notification, the prefetch unit may be configured to inhibit using an address associated with the memory access instruction including the particular hint, when calculating subsequent memory blocks to prefetch.

Description

BACKGROUND OF THE INVENTION[0001]1. Field of the Invention[0002]This invention relates to microprocessors and, more particularly, hardware prefetching.[0003]2. Description of the Related Art[0004]Modern microprocessors attempt to detect patterns in memory accesses and to prefetch memory locations into the processor caches in an effort to reduce latencies associated with memory accesses. However, some access patterns may cause the prefetch hardware to prefetch memory blocks that will not be used. Since the caches are limited in size, the unused blocks may cause useful blocks to be flushed from the caches.[0005]One example, of a pattern that does not lend itself to efficient hardware prefetching is a pattern created by “walking” through the elements of a linked list, and reading some of the data in the objects in the linked list. If reading the data in each object reads in enough cache lines to trigger the hardware prefetcher, it is unlikely that the next sequential data fetched is li...

AI Technical Summary

Benefits of technology

This approach effectively reduces cache pollution and improves memory access efficiency by preventing the prefetching of unnecessary data, ensuring that valuable cache space is utilized for actually needed data.

Problems solved by technology

However, some access patterns may cause the prefetch hardware to prefetch memory blocks that will not be used.

Since the caches are limited in size, the unused blocks may cause useful blocks to be flushed from the caches.

One example, of a pattern that does not lend itself to efficient hardware prefetching is a pattern created by “walking” through the elements of a linked list, and reading some of the data in the objects in the linked list.

Accordingly, in this case, valuable cache space may be wasted, and the useful data may be evicted.

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