System and method of transistor switch biasing in a high power semiconductor switch

Abstract

A circuit and method are provided for switching in a semiconductor based high power switch. Complementary p-type based transistors are utilized along insertion loss insensitive paths allowing biasing voltages to alternate between supply and ground, allowing for negative voltage supplies and blocking capacitors to be dispensed with, while improving performance.

Description

FIELD OF THE INVENTION[0001]The invention relates to high power semiconductor switches, and more particularly to FET switch layouts and biasing thereof.BACKGROUND OF THE INVENTION[0002]In modern RF communication systems, a semiconductor-based transmit-receive switch is often the last / first component encountered by a transmitted / received signal before / after encountering an antenna.[0003]Many of the main advances in semiconductor-based transmit-receive switches have been with respect to isolation and insertion loss. Groups of FETs are arranged in the switch along with judiciously chosen resistors and capacitors to ensure low insertion loss along the signal path and high isolation from the off paths. One general approach utilizes, instead of a single FET switch along each alternative path, a group of FET switches in series. This general approach moreover does not simply turn the FETs on and off by utilizing only a voltage at the gate, but instead biases both the gate and the source / dra...

AI Technical Summary

Benefits of technology

This design achieves low insertion loss and high isolation with reduced component complexity, improved robustness against ElectroStatic Discharge, and lower IC die area usage, while maintaining efficient high-power signal transmission.

Problems solved by technology

Some of the drawbacks of the series shunt switch 100 of FIG. 1A are that it requires oscillators, charge pump circuitry, positive and negative voltage regulators, supply filtering including a negative supply filter which usually occupies a much larger area than a positive supply filter, and a pseudo-random bit sequence (PRBS) generator.

The additional components can create noise, spurious tones, and spurious spectral emissions and tend to occupy a large percentage of IC (integrated chip) die area, and consume extra DC power.

Some of the drawbacks of the series-shunt switch 150 of FIG. 1B are that it often requires a DC-DC boost converter circuit (not shown), and requires that all terminals be blocked with an appropriately sized blocking capacitor in order to ensure flexible voltage settings.

Integrated DC blocking capacitor's take up significant IC die area and may easily be damaged during ESD (ElectroStatic Discharge) events hampering the reliability and robustness of the circuit.

Use of off chip capacitors also occupies a significant board area and can add significant cost.

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