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Imaging apparatus with sensor chip and separate signal processing chips

a technology of signal processing chip and sensor chip, which is applied in the field of imaging apparatus, can solve the problems of image quality or the like degradation in the pixel array, complex manufacturing process, and deformation of the yield, and achieve the effects of suppressing image quality deterioration, reducing line resistance, and low resistan

Active Publication Date: 2015-11-17
NIKON CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Benefits of technology

[0012]According to this aspect, in order to perform a high-speed operation, the sensor chip and the signal processing chip are provided on the same substrate, the signals output from the pixel array of the sensor chip are processed by the signal processing circuits of the signal processing chips, and the signals processed by the signal processing chips are transmitted outside the substrate through the external connection portions. For example, when power or the like necessary for driving the sensor chip through the external connection portions is supplied directly to the pixel array through the second wiring patterns, and when the second wiring having line resistance lower than the second pattering wiring formed on the substrate is routed close to, for example, the input terminals of the sensor chip, the total length of the second pattern wiring can be reduced, thereby reducing line resistance as a whole. For this reason, for example, it is possible to suppress deterioration in image quality due to line resistance without causing an increase in the size of the substrate.
[0014]According to this aspect, in order to perform a high-speed operation, the sensor chip and the signal processing chip are provided on the same substrate, the signals output from the pixel array of the sensor chip are processed by the signal processing circuits of the signal processing chips, and the signals processed by the signal processing chips are transmitted outside the substrate through the external connection portions. And, when power or the like necessary for driving the sensor chip through the external connection portions is supplied directly to the pixel array through the second wiring patterns, the wiring layers of the signal processing chip are effectively used, and the wiring layers are provided to be connected to the wiring layers in the middle of the second wiring patterns, thereby reducing line resistance by the wiring layers of low resistance compared to a case where only the second wiring patterns on the substrate are used. For this reason, for example, it is possible to suppress deterioration in image quality due to line resistance without causing an increase in the size of the substrate.

Problems solved by technology

However, in order to achieve higher-speed processing, since a sensor unit which has a large dynamic range with low noise and a high power supply voltage and a digital circuit in which a fine transistor is provided to perform an ultra high-speed operation with a lower power supply voltage are constituted by a single chip, a manufacturing process becomes complicated, and yield is degraded.
During a high-speed operation, heat generation of the chip, especially, heat generation of the A / D converter, may increase, thereby causing degradation in image quality or the like in the pixel array due to a rise in temperature.

Method used

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Embodiment Construction

[0027]Next, an imaging apparatus according to an embodiment of the invention will be described with reference to the drawings.

[0028]FIG. 1 shows an imaging apparatus 1 of this embodiment. The imaging apparatus 1 is a so-called digital single lens reflex camera. A lens barrel 3 is detachably attached to a lens mount (not shown) of a camera body 2, and light which passes through a lens 4 of the lens barrel 3 is focused on a sensor chip 6 of a multi-chip module 5 disposed on the rear side of the camera body 2. The sensor chip 6 is a chip, such as a so-called CMOS image sensor.

[0029]FIG. 2 shows the multi-chip module 5. The multi-chip module 5 includes a sensor chip 6, an upper signal processing chip 7, and a lower signal processing chip 8.

[0030]The sensor chip 6 includes a pixel array 10 which has a plurality of pixels arranged in a two-dimensional manner along a column direction and a row direction to output signals (hereinafter, simply referred to as pixel signals) according to incid...

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Abstract

An imaging apparatus includes a sensor chip, a substrate, upper and lower signal processing chips and connection boards. The sensor chip has pad electrodes to which electrical signals to be supplied to a pixel array are input. The substrate has first wiring patterns connected to signal lines, to which signals of the pixel array are output, and second wiring patterns connected to pad electrodes. The upper and lower signal processing chips have pad electrodes to which signals processed by signal processing circuits are output. The connection boards have FPC wiring electrically connected to the pad electrodes and FPC wiring electrically connected to the second wiring patterns formed on the substrate.

Description

TECHNICAL FIELD[0001]The present invention relates to an imaging apparatus which captures a subject image.[0002]Priority is claimed on Japanese Patent Application Nos. 2010-191058 and 2010-191059, filed Aug. 27, 2010, the content of which is incorporated herein by reference.BACKGROUND ART[0003]In the related art, in a sensor chip including a pixel array which converts incident light to electrical signals, a so-called bare chip mounting structure in which a chip is mounted directly on a glass substrate is known. In the bare chip mounting structure, the electrical signals output from the sensor chip are output outside the glass substrate through wiring patterns provided on the glass substrate (for example, see Patent Documents 1 and 2).[0004]In recent years, in a large sensor chip which is used in a so-called digital single lens reflex camera, there is demand for a higher-speed operation, and an A / D converter is provided for each column of the pixel array on the same chip to perform s...

Claims

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Application Information

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Patent Type & Authority Patents(United States)
IPC IPC(8): H01L27/146H04N5/369
CPCH01L27/14636H01L27/14618H04N5/369H01L2924/0002
Inventor ISOGAI, TADAO
Owner NIKON CORP