TV set LCD time sequence controlling method during open
A technology of LCD TV and boot sequence, applied in the direction of instruments, static indicators, etc., can solve the problems of unstable low-voltage differential signal, disordered clock signal, screen blurry, etc.
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[0009] The present invention will be described in further detail below through specific embodiments and in conjunction with the accompanying drawings. As shown in Figure 1, Q1 is an NPN triode; U2 is an enhanced P-channel FET; PLANE DRIVE is the driving circuit of the LCD display; PLANE INVERTER is the backlight module of the LCD display; CPU is the main control microprocessor; TSU6666 is a signal processing controller that can convert R, G, B signals into LVDS signals.
[0010] As shown in Figure 1 and Figure 3, after the power-on signal is sent, the main control microprocessor CPU outputs a high level to turn on the power supply of the driving circuit of the liquid crystal display, and after time T1, the power supply is basically stable. After the power supply is stable and after T2 time, the signal processing controller TSU6666 turns on the low-voltage differential (LVDS) signal output; within T5 time after turning on the LVDS signal output, the main control microprocessor ...
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