Reading and writing method for CPU and its realizing circuit

Abstract

This invention discloses a CPU read / write method and the realization circuit. It includes the process as follow: the efficient sampling signal which contains the read control or writes control signal can be produced, the sampling signal hold completely synchronization with the control signal. The sampling signal is turned over and prolonged, and this can produce time-lapse sampling signal. The sufficient width of pulse and upside efficient read signal and writes signal can form by the sampling and time lapse signal. The upside effective read and writes signal can incorporate to a read write timer signal which contains the read / write information at the same time and can take as the object of read / write timer input signal. The sampling time-lapse signal is turned over and as read / write control signal; the CPU can accomplish the read / write operation of the object. This invention and the realization circuit can satisfy there is only read / write signal without the supply of the CPU timer, and when there is only one timer interface at the object of CPU, CPU can accomplish the read / write operation of the object.

Description

technical field [0001] The invention relates to a method for digital program-controlled exchange, in particular to a method for a CPU in a digital exchange system to perform read and write operations on complex sequence read and write objects and a circuit for its realization. Background technique [0002] In the digital switching system, it is often encountered that the CPU needs to read and write a large amount of memory. When the CPU operates the read and write objects through the general interface circuit, the read and write objects must meet the timing requirements of the CPU. [0003] For memory, such as RAM, etc., which have relatively complex timing, it is difficult to meet the timing requirements of the CPU at the same time due to its own timing characteristics. At the same time, when the CPU reads and writes the memory, if the CPU clock signal is not provided to the memory clock port, it is impossible to directly perform both read and write operations on the read a...

AI Technical Summary

Problems solved by technology

[0003] For the reading and writing objects of memory such as RAM with complex timing, due to its own timing characteristics, it is difficult to meet the timing requirements of the CPU at the same time

At the same time, when the CPU reads and writes the memory, if the CPU clock signal is not provided to the memory clock port, it is impossible to directly perform both read and write operations on the read and write objects.

[0004] Therefore, when the CPU needs to perform read and write operations on read and write objects with complex timing, the general read and write interface circuit is not competent

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