Stream cipher generator, random digit generation method, encrypting system and encryption method
A generator and stream cipher technology, applied in random number generators, digital transmission systems, transmission systems, etc., can solve the problems of untestable illegal equipment and low security of HDCP system, and achieve high security effects
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Embodiment 1
[0059] The linear feedback shift register LFSRa, which performs shift operation by byte, has 64 bits. The pre-positioned 8-bit numbers are serially output and subjected to XOR operation (that is, these 8-bit serial modulo 2 additions), and the resulting 8-bit τ is fed back to the linear transformation module T1.
[0060] Wherein, T1 is a linear transformation module whose output is 8 bits. The structure of T1 is as Figure 1B Shown: includes three mutually independent parts T1A, T1B, T1C, and a selector switch.
[0061] The T1A component consists of three parts: a read-in unit, an adjustment unit, and an arithmetic unit. In the input process, the read-in unit reads the 8-bit τ fed back by LFSRa from the bus, the output G2 (8-bit), G1 (8-bit), G0 (8-bit) of the output module G and the vector IV3k+2 of the 8-bit input (k=0, 1, ..., 4, five rounds of input); the adjustment unit uses the method of adjusting the order of the data lines to readjust the bit sequence of the data re...
Embodiment 2
[0069] The linear feedback shift register LFSRβ has 35 bits, and its shift operation is triggered by a pulse. In the input process, LFSRβ first reads in a 33-bit key through a pulse. The output 8-bit number is added in binary system) to its left end, and shifted to the right by 1 bit, then K performs XOR operation on the 8 bits at its left end, and then rotates to the right by 8 bits. In the process of closed-loop operation and external output, LFSRβ first XORs the pre-positioned number and feeds it back to its left end, and shifts right by 1 bit, and then shifts 8 bits to the right in a cycle. In the process of closed loop operation and external output: feed back the pre-positioned numbers to the left end after XOR operation (that is, add the 8-bit numbers output by these bits) to the left end, and shift right by 1 bit, and then loop Shift right 8 bits.
[0070] The structure of K is composed of Figure 1CShown: including read-in unit, adjustment unit, arithmetic unit, wri...
Embodiment 3
[0072] The linear feedback shift register LFSRγ has a total of 31 bits, and it operates under pulse triggering. In the read-in process, LFSRγ reads in a 31-bit key through a pulse, and performs an XOR operation on its predetermined digits (such as the numbers of the 1st, 4th, 7th, 8th, and 14th) (that is, the 8 bits output by these bits The number of bits is added in binary system) to its left end, and shifted to the right by 1 bit, and then L performs an XOR operation on the 8 bits at its left end, and then rotates to the right by 8 bits. In the process of closed-loop operation and external output, LFSRγ first XORs the pre-positioned number and feeds it back to its left end, and then shifts right by 1 bit, and then shifts 8 bits to the right in a cycle. In the closed loop operation and external output process: feed back the pre-positioned numbers to the left end after XOR operation (that is, add the 8-bit numbers output by these bits) to the left end, and shift right by 1 bit...
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