Four-quadrant multiplication circuit

Abstract

The invention discloses a four-quadrant multiplication circuits. The invention will take two roads digital signal from filtering, and with the modulation of synchronized signals, perform the parallel / serial conversion on the input to generate one road signals. The signals comes through a high-pass filter, which consists of a shift unit, first cache unit, second cache unit, third cache unit, fourth cache unit and calculator, to filter on the combined input signals, to attenuate DC bias in signals, and then to calculate the four-quadrant multiplication of the two roads signals contained in the input signals through a serial multiplier.

Description

technical field [0001] The invention relates to digital circuit technology, in particular to a four-quadrant multiplication circuit. Background technique [0002] Four-quadrant multiplication refers to multiplying two time-varying signals to produce a real-time four-quadrant product. figure 1 It is a schematic diagram of a circuit structure for realizing four-quadrant multiplication in the prior art. like figure 1 As shown, the four-quadrant multiplication circuit usually includes: two high-pass filters (HPF1 and HPF2) and a multi-bit multiplier. [0003] Signal 1 and signal 2 are converted into two multi-bit digital signals after passing through two modulators (M1 and M2) and two first-stage low-pass filters (LPF11 and LPF12) respectively, and input to the four-quadrant multiplication circuit . M1 and M2, LPF11 and LPF12 mainly play the role of decimation filter. [0004] HPF1 and HPF2 in the four-quadrant multiplication circuit receive the multi-bit signal 1 and signa...

AI Technical Summary

Problems solved by technology

[0009] However, to realize the above-mentioned four-quadrant multiplication circuit, two sets of filters are required, and the circuit cost is relatively high

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