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Semiconductor component and method for forming the same

A technology for semiconductors and components, applied in the field of semiconductor components with sidewall spacers and their formation, can solve problems such as reliability problems, and achieve the effects of reducing undercut and increasing area

Active Publication Date: 2010-02-10
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

Sidewall etch creates reliability issues, especially when contacts are misaligned

Method used

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  • Semiconductor component and method for forming the same
  • Semiconductor component and method for forming the same
  • Semiconductor component and method for forming the same

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Embodiment Construction

[0023] In order to make the above and other objects, features, and advantages of the present invention more comprehensible, a preferred embodiment is specifically cited below, and is described in detail in conjunction with the accompanying drawings as follows:

[0024] Next, the formation of the sidewall spacer on the gate pattern of the field effect transistor will be described with a preferred embodiment of the present invention. However, the present invention can also be applied to various conductor patterns in integrated circuits, such as local interconnection lines or other polysilicon used to connect semiconductor devices. The words "on a substrate", "on a layered structure" or "on a thin film" described herein describe the relative position to the underlying surface, regardless of whether there are other structures between the two, thus It can be seen that this expression can be interpreted as the direct contact between the upper and lower structures, or it can be inter...

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Abstract

A semiconductor component and method for forming the same, the semiconductor device comprises: a conductor pattern; a L-shaped spacer including a vertical portion and a horizontal portion, the vertical portion disposed on lower sidewalls of a conductor pattern, exposing upper sidewalls thereof; and a top spacer on the L-shaped spacer, wherein a width ratio of the vertical portion of the L-shaped spacer to the top spacer is at least about 2:1. The present invention provides a simple and well-controlled spacer scheme to increase the area for silicide formation. Further, the resulting spacer is less susceptible to undercut by lateral etching. Finally, the invention does not increase complexity of the spacer process. In the simple way, it may merely change the thickness ratio of the spacer insulating layers.

Description

technical field [0001] The invention relates to a semiconductor manufacturing process technology, in particular to a semiconductor element with a sidewall spacer and a forming method thereof. Background technique [0002] Metal silicides have been commonly used to reduce the gate resistance and the resistance of the source and drain between the gates. However, as the size of semiconductor elements shrinks gradually, the distance between the two gates also shrinks. Since the gate spacer has a certain width, the available space for forming metal silicide shrinks faster than the gate pitch, so in It is also increasingly difficult to form metal silicides between the gates, resulting in excessive and uneven distribution of resistance in these regions. In addition, when the spacer is formed by dry etching, the width of the spacer between the gates is likely to be inconsistent due to the thinner and thinner etching conditions and poor control of the etching conditions, thereby red...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L29/423H01L29/78H01L23/522H01L21/28H01L21/336H01L21/768
CPCH01L21/76897H01L29/66507H01L21/28052H01L29/6653H01L29/6656
Inventor 郑光茗郑钧隆庄学理
Owner TAIWAN SEMICON MFG CO LTD