Flash memory section and method for erasing flash memory cluster

A memory and flash technology, applied in information storage, static memory, instruments, etc., can solve problems such as leakage of electricity in the memory area and waste of time

Active Publication Date: 2008-01-30
ELITE SEMICON MEMORY TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, some memory areas may leak electricity every time, and need to be repaired every time
This situation will waste a lot of time

Method used

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  • Flash memory section and method for erasing flash memory cluster
  • Flash memory section and method for erasing flash memory cluster
  • Flash memory section and method for erasing flash memory cluster

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Embodiment Construction

[0031]As described below, the preferred embodiment of the present invention uses flags to designate memory regions that have bit line leakage currents, as well as memory regions that are validated by erase. The following embodiments therefore avoid deep over-erase and improve efficiency by omitting redundant and often harmful erase pulses. Another factor that improves the efficiency of the present invention is that the following embodiments use soft programmed confirmations that are faster than erase confirmations to reduce the frequency of use of inefficient erase confirmations.

[0032] FIG. 5 is a flowchart of a flash memory group erasing method according to an embodiment of the present invention. The flow starts at step 510 . First, Erase Verification (ERSV) is performed on this memory group. If the entire memory group is confirmed by erasing, the process ends here. Otherwise, the process goes to step 520 , and erase pulses are applied to all the memory areas not marked...

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Abstract

A quick-flashing memory group erasing method includes the following steps: (a) an erasing pulse is exerted on the first subset of a quick-flashing group. (b) A soft program validation or a strict program validation is carried out on the first subset. (c) The step (a) and the step (b) are repeated until the first preinstalled condition is true. (d) The second subset of the memory group is carried out to an erasing validation. (e) The step (a) and the step (d) are repeated until the second preinstalled condition is true. At last, (f) ways of slow programming and exerting the erasing pulse are used for repairing the bit line current leaking phenomenon of the third subset of the memory group.

Description

technical field [0001] The present invention relates to a flash memory, and in particular to a method for erasing a flash memory area and a method for erasing a flash memory group (METHOD FOR ERASING A FLASH MEMORY SECTORAND METHOD FOR ERASING A FLASH MEMORY GROUP). Background technique [0002] Every time a flash memory cell is erased, it is always possible to lower the threshold voltage of the memory cell. The so-called over-erase refers to the condition of bit line leakage in the flash memory cell. If a memory cell that has been over-erased is erased again, deep over-erase may occur. Because deep over-erasing cannot be repaired, it should be avoided if possible. [0003] FIG. 1 is a flow chart of a traditional method for erasing a flash memory group. A flash memory group is a collection of multiple flash memory sectors. In step 110, an erase pulse (ERS pulse, that is, an erase pulse) is applied to a memory group to simultaneously erase all memory areas of the memory g...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C16/14
Inventor 林扬杰
Owner ELITE SEMICON MEMORY TECH INC
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