Conductive layer structure for chip encapsulation module and its making method
A chip packaging and manufacturing method technology, applied in semiconductor/solid-state device manufacturing, circuits, electrical components, etc., can solve the problems of easy oxidation of conductive layers, achieve the effects of suppressing noise, improving EMI protection performance, and structural stability
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[0041] The features of the present invention can be clearly understood by referring to the accompanying drawings of this specification and the detailed description of the embodiments.
[0042] The present invention mainly solves the problems that the conductive layer of the existing chip packaging module is easy to oxidize and corrode, cannot effectively suppress noise, and the structure is unstable, such as Figure 4 (A cross-sectional view of the structure of the chip package module in a preferred embodiment of the present invention) shows that the chip package module used in the present invention also includes parts such as photosensitive chips 21, circuit structures, and housings; wherein, all photosensitive chips used for photosensitive 21 are arranged on a wafer 22 arranged inside the housing.
[0043] Wherein, an insulating layer 23, a conductive layer 24, and the outermost solder resist layer 25 and circuit pins 26 are sequentially arranged under the wafer 22; in the e...
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Abstract
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