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Self-identifying stacked die semiconductor components

A semiconductor and die technology, applied in semiconductor devices, electric solid state devices, electrical components, etc., can solve the problems of increasing the cost of processing die, increasing the cost of conventional stacked die devices, etc.

Active Publication Date: 2008-08-27
MICRON TECH INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In addition to the increased cost of handling die in this manner, die that are different from each other must be separated and uniquely tracked via a manufacturing part tracking system, further increasing the cost of conventional stacked die devices

Method used

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  • Self-identifying stacked die semiconductor components
  • Self-identifying stacked die semiconductor components
  • Self-identifying stacked die semiconductor components

Examples

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Embodiment Construction

[0011] The present invention describes stacked die structures comprising consistently fabricated dies that automatically sense their position in the structure and are uniquely selectable by prescribed control signals. The following description is presented to enable those skilled in the art of semiconductor device design and fabrication to make and use the invention as claimed, and is presented in the context of the specific examples discussed below, as will be readily apparent to those skilled in the art. Variations of the specific examples described are appreciated. Thus, the appended claims are not intended to be limited by the disclosed embodiments, but are to be accorded the widest scope consistent with the principles and features disclosed herein.

[0012] According to the present invention, a plurality of known good dies are stacked and electrically coupled to provide a component with defined functionality, wherein a plurality of external control pins are provided which...

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Abstract

A semiconductor die having a functional circuit (e.g., a memory array) and a decode circuit suitable for use in a stacked die semiconductor component (e.g., a random access memory component) is described. The decode circuit permits individual die in a stacked die structure to automatically determine their location or position in the stack and, in response to this determination, selectively pass one or more external control signals (e.g., chip select and clock enable signals) to the decode circuit's associated functional circuit based on inter-die connection patterns. This ''self-configuring'' capability permits all die designated for a specified functionality (e.g., a memory module including four vertically aligned die) to be uniformly or consistently manufactured. This, in turn, can reduce the cost to manufacture stacked die components.

Description

technical field [0001] The present invention relates generally to semiconductor devices, and more particularly to stacked die semiconductor devices, and to methods for uniquely identifying individual die within a stacked die structure. Background technique [0002] Semiconductor devices are typically constructed from silicon or gallium arsenide wafers through a fabrication process involving many deposition, masking, diffusion, etching and implantation steps. Each fabrication flow produces a wafer in which many identical integrated circuit ("IC") devices are formed. After fabrication, the wafer is divided into individual cells, or dies, where each die contains one IC device. Traditionally, individual dies are encapsulated in a molding and electrically connected to leads protruding from the molding. More recently, multiple grains have been arranged in a single inclusion. In one such arrangement, two or more dies are vertically aligned and electrically interconnected to form...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G11C5/06
CPCG11C5/02G11C8/10G11C5/063H01L2224/16145G11C5/06
Inventor 保罗·西尔韦斯特里
Owner MICRON TECH INC