Watchdog reset circuit and reset method

A reset circuit and watchdog technology, applied in data reset devices, electrical digital data processing, instruments, etc., can solve problems such as the failure of the watchdog circuit and the inability of the watchdog circuit to work.

Active Publication Date: 2009-02-18
SHANGHAI MUNICIPAL ELECTRIC POWER CO
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At this time, a problem arises. When EPLD is upgraded, all IO pins are tri-state, that is to say, the watchdog circuit loses its function at this time.

Method used

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  • Watchdog reset circuit and reset method

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Embodiment Construction

[0019] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0020] Such as figure 1 As shown, in the watchdog reset circuit that the watchdog circuit still works normally during the upgrade of the programmable device, the present invention is provided with more than two programmable devices, and the second new programmable device is to upgrade the programmable device It acts as a temporary watchdog during the version period and is another watchdog, so the watchdog circuit provided by the present invention can also be regarded as a multi-watchdog reset circuit. figure 1 With two programmable devices shown, the multi-watchdog circuit consists of the following blocks:

[0021] The CPU processor is connected to the programmable device through the bus, and receives the power-on reset signal (Power_Reset) sent by the watchdog circuit;

[0022] Programmable device 1, used to cooperate with the watc...

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PUM

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Abstract

The invention discloses a watchdog reset circuit and a reset method thereof, which can guarantee normal operation of the watchdog circuit during the upgrade of programmable device. The watchdog reset circuit includes a CPU, a watchdog module and a programmable device connected in series, and at least one component with timing function; the component and the programmable device are arranged in parallel, a reset signal is output to a reset signal port of the watchdog module, the component receives the bus signal of the CPU, timing is started when the programmable device is under upgrading, if the CPU halts during the time of timing, the component outputs the reset signal to the watchdog module when the timing times out, and the watchdog module outputs a power-up reset signal to the CPU and restarts the CPU.

Description

technical field [0001] The present invention relates to the field of electronic data processing (G06) and the field of electric communication technology (H04), in particular to a watchdog reset circuit and a reset method. Background technique [0002] At present, most single boards on the base station have chips such as CPU, watchdog, and EPLD. Among them, the CPU is the brain of the board management and maintenance, and the EPLD acts as address decoding, chip selection and reset distribution, and cooperates with the watchdog and other functions. The version of EPLD is burnt in at one time after the realization of the single board. There are various ways to realize the watchdog circuit of the single board, but the general idea is that the CPU extends the dog feeding time through EPLD, which prolongs the reset time of the watchdog chip. However, as the capacity of EPLD chips continues to increase, EPLDs perform more and more functions. In order to improve design flexibility...

Claims

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Application Information

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IPC IPC(8): G06F11/00G06F1/24
Inventor 张成安周代彬
Owner SHANGHAI MUNICIPAL ELECTRIC POWER CO
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