Cipher processor supporting thread-level encryption and decryption and its cipher operation method

An encryption and decryption, processor technology, applied in the direction of electrical digital data processing, instruments, calculations, etc., can solve the problems of not being able to provide cryptographic algorithms, not being able to complete multi-key random cross-encryption and decryption, and not being able to support cross-encryption and decryption. The effect of sewing arbitrary switching

Inactive Publication Date: 2009-05-13
XIDIAN UNIV
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  • Summary
  • Abstract
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AI Technical Summary

Problems solved by technology

[0004] Because cryptographic algorithm is a kind of critical resource, therefore, utilize above-mentioned existing cryptographic processor can not support the encryption and decryption random interleaving operation of...

Method used

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  • Cipher processor supporting thread-level encryption and decryption and its cipher operation method
  • Cipher processor supporting thread-level encryption and decryption and its cipher operation method
  • Cipher processor supporting thread-level encryption and decryption and its cipher operation method

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Embodiment Construction

[0042] refer to figure 2 , the present invention consists of data register, status register, command register, address bus and control logic, power supply detection, random number generator, key generator, nonvolatile memory, volatile memory, execution engine, special volatile memory, a dedicated volatile memory controller, and index registers. Among them, the dedicated volatile memory, the dedicated volatile memory controller and the index register are used to interact with the execution engine internally to complete thread-level encryption and decryption. The index register is connected to the external data bus through the sixteenth channel C16, and is connected to other modules through the fifteenth channel C15. The current thread index number is stored in the index register, and the execution engine and the control logic generate pairs according to the value of the index register. Base address for addressing dedicated volatile memory and external parallel / serial volatile...

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Abstract

The present invention discloses a cipher processor that support thread level encryption and decryption and the method of cipher, which belongs to digital communication technology field. The cipher processor comprises data register, status register, command register, address bus, control logic, power supply test, random number generator, key generator, nonvolatile memory, volatile memory, execution engine, special volatile memory, special volatile memory controller and index register, wherein thread level encryption and decryption is done inside after interactive operation among special volatile memory, special volatile memory controller, index register and execution engine. Multi-thread processing is realized through initialization thread operation to each data stream at the first encryption and decryption and operation of different thread encryption and decryption switching by the cipher processor. The invention settles the problem of multi-key and randomized cross encryption and decryption of cipher processor, and can support existing cryptosystems and all working mode.

Description

technical field [0001] The invention belongs to the technical field of digital communication, in particular to a cryptographic processor and a cryptographic operation method thereof, which are used for encryption and decryption of many-to-multiple cryptographic communications. Background technique [0002] With the development of digital communication technology, the increasing popularity of computer networks and the widespread application of various information systems, encryption based on cryptographic algorithms has become the basis for information confidentiality, integrity, non-repudiation and authentication. As a result, encrypted terminal devices may cross-access multiple encrypted servers at the same time, or realize cross-communication with multiple encrypted terminals; encrypted backbone devices such as VPNs and gateways face multiple users randomly cross-accessing different service objects. In summary, these cross-accesses are actually a thread-level encryption an...

Claims

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Application Information

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IPC IPC(8): H04L9/08G06F21/00G06F21/62
Inventor 李凤华马建峰李晖王九林孙春辉阎军智史国振马卓
Owner XIDIAN UNIV
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