Gate replacing method for easing aging of integrated circuit and reducing leakage power consumption

Abstract

The invention provides a gate replacing technology for easing aging of integrated circuit while reducing leakage power consumption, belonging to the technical field of integrated circuit designing; the method is characterized in that on the precondition of not affecting circuit performance, a small quantity of extra power consumption and area and computerized emulation operation time in case of circuit designing are added to achieve the dual purpose of easing aging of integrated circuit and reducing leakage power consumption by replacing part of logic gates in the circuit when the circuit is idly in a sleep state.

Description

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AI Technical Summary

Benefits of technology

This new technology helps prevent damage from over-aging or leaking electronic components while still maintain their effectiveness for use with other devices that require less energy than usual.

Problems solved by technology

This patents discuss various technical methods aimed towards decreasing negative effects associated with increased resistance in semiconductor processes such as complementary metal-on-silicone (CMOS), nitride thin film deposition, ion implantations during fabricating processes, dopants migration from defects in materials, impurities generated within these layers, and stress relaxation mechanisms leading to reduced lifetimes over time. However, this issue can lead to malfunctions in electronic components like memristive elements, causing delays in processing operations. To address it, some conventional measures including double-stress thermostat activation and passivation masking were developed but they resulted in increases in leakage currents and static work functions.

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