EOS tester of integrated LCAS simulation and VCG time delay simulation
A tester and simulation technology, applied in the direction of time division multiplexing system, digital transmission system, electrical components, etc., can solve the problems that the maximum differential delay cannot be realized, EOS tester is not found, etc., to meet the bandwidth requirements, The effect of restoring capacity
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[0039] In order to make the purpose, technical solutions and advantages of the present invention clearer, the implementation of the present invention will be further described in detail below in conjunction with the accompanying drawings:
[0040] This embodiment provides an EOS tester integrating LCAS simulation and VCG delay simulation.
[0041] see image 3 , the user 38 is connected to the link adjustment mechanism LCAS simulation module 41 through the user interface 39 and the control unit 40, and the LCAS simulation module is connected to the EOS tester 30a. The EOS tester includes an Ethernet interface 31, which is connected to the EOS device 30 to be tested via Ethernet, and receives and sends Ethernet signals; the STM-N interface 37 is connected to the STM-N interface in the EOS to be tested, and is used to receive and send the STM-N Signal; processing unit, including SDH overhead processing module 36, VC mapping and demapping module 34 and GFP encapsulation and deca...
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