Self-biased phase-locked loop

Abstract

The invention relates to a self-biased phase-locked loop which comprises a phase frequency detector, a charge pump, a loop filter, a voltage controlled oscillator, a frequency demultiplier and a biased current converter, wherein charging or discharging current output by the charge pump is equal to a first control current; a resistor of the loop filter is controlled by a first control voltage and a second control voltage, the second control voltage is adjusted according to the first control voltage and a second control current, and the loop filter increases or reduces the first control voltage according to the charging or discharging current output by the charge pump; the voltage controlled oscillator generates oscillating voltage and biased current according to the first control voltage, and accelerates or slowers oscillating frequency according to the increase or the reduction of the oscillating voltage; and the biased current converter converts the biased current to a first control current and the second control current, wherein the first control current is equal to the ratio of the biased current and a constant; and the second control current is equal to the ratio of the biased current and the frequency demultiplication number of the frequency demultiplier. The self-biased phase-locked loop has the characteristics of simple current and low dithering.

Description

technical field [0001] The invention relates to phase-locked loop technology, in particular to a self-biased phase-locked loop. Background technique [0002] A phase-locked loop (PLL, Phase Locked Loop) is widely used in a system-on-chip (SOC, Systemon Chip) to form a frequency synthesizer, a clock generator, and the like. figure 1 It is a basic phase-locked loop structure, and a Phase Frequency Detector (PFD, Phase Frequency Detector) 10 detects the input signal F ref and the feedback signal F fb Frequency difference and phase difference, produce pulse control signal UP, DN and send into charge pump (CP, chargepump) 20; In charge pump 20, pulse control signal UP, DN are converted into current I p To the capacitor C of the loop filter (LP, Loop Filter) 30 p charging and discharging, the loop filter 30 generates a control voltage V ctrl into a voltage-controlled oscillator (VCO, Voltage Control Oscillator) 40; the voltage-controlled oscillator 40 controls the voltage V c...

AI Technical Summary

Problems solved by technology

[0020] 3. A bias generator that generates a bias voltage from the control voltage is added to provide the input voltage of the voltage-controlled oscillator, and the circuit structure of the bias generator is also relatively complicated

[0021] Therefore, in order to meet the requirement that the damping factor of the loop is a fixed value, the existing self-biased phase-locked loop has made major changes to the basic phase-locked loop, and the structure is more complicated

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