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Device and method of matrix data rotating by bit based on FPGA

A matrix data, 64bit technology, applied in the field of FPGA technology and printing and printing, can solve the problems of affecting the productivity of the printing machine, the inefficiency of the general-purpose computer, and the inability to meet the high-speed printing data throughput of the printing machine, and achieve the effect of improving the rotation efficiency.

Active Publication Date: 2010-07-07
ZHEJIANG UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0002] In the structure of printing printers, general-purpose computers are used to complete the data rotation processing, but general-purpose computers are not efficient in bit-by-bit rotation operations, and cannot meet the data throughput required by printing machines for high-speed printing, so in The speed at which data rotates by bit becomes the key to the printing machine, and its rotation efficiency directly affects the production capacity of the printing machine

Method used

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  • Device and method of matrix data rotating by bit based on FPGA
  • Device and method of matrix data rotating by bit based on FPGA
  • Device and method of matrix data rotating by bit based on FPGA

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Embodiment Construction

[0037] Such as figure 1 As shown, the work completed by the present invention is to realize the function of rotating a 64bit×64bit matrix.

[0038] Such as figure 2 As shown, the division method of dividing the target matrix into four 16bit×64bit matrices is divided into four blocks in sequence according to the input sequence of the data.

[0039] Such as image 3 Shown, the internal structure of device of the present invention comprises:

[0040] The data input unit 100 is used to divide the matrix data of 64bit×64bit to be rotated into 4 block matrices with a size of 64bit×16bit, and divide the 4 block matrices into two groups;

[0041] Two data matrix units, both of which are 64bit×16bit in size, are used to temporarily store the rotating block data divided into 64bit×16bit, which are divided into left data matrix unit 110a and right data matrix unit 110b, which can realize the operation of the second-level pipeline;

[0042] The data storage unit 120 is used to store ...

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Abstract

The invention discloses a device of 60 bit*64 bit matrix data rotating by bit based on an FPGA, which comprises a data matrix unit, a data storage unit and a data synthesis unit. The invention also discloses a method of 60 bit*64 bit matrix data rotating by bit based on the FPGA, which comprises the following steps: dividing target matrices; distributing data input; and controlling the data storage and controlling the data synthesis. Compared with the rotation realized through a computer, the rotation provided by the invention has the advantage that the higher rotation efficiency can be realized.

Description

technical field [0001] The invention relates to the field of FPGA technology and printing, in particular to an FPGA-based 64bit×64bit matrix data bit-by-bit rotation device and method. Background technique [0002] In the structure of printing printers, general-purpose computers are used to complete the data rotation processing, but general-purpose computers are not efficient in bit-by-bit rotation operations, and cannot meet the data throughput required by printing machines for high-speed printing, so in The speed at which data rotates by bit becomes the key to the printing machine, and its rotation efficiency directly affects the production capacity of the printing machine. [0003] In recent years, FPGA technology has achieved rapid development, and it has changed from an application that can only be oriented to pure logic replacement to a complex calculation-intensive application. The latest FPGA devices not only integrate rich configurable logic block resources (Config...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06K15/00B41F16/00
Inventor 陈耀武袁龙涛
Owner ZHEJIANG UNIV