Error correction device of storage device and method thereof

Abstract

The invention discloses an error correction device of a storage device and a method thereof, belonging to the field of the error correction of a storage device. The error correction device of a storage device comprises at least one coding / decoding module, an arbitration manager and error correction circuits, wherein the coding / decoding module carries out the data decoding on the read data of the storage device under the control of a storage controller and sends out decoding completion signals and decoded data; the arbitration manager receives the decoding completion signals and the decoded data sent by the coding / decoding module, judges whether the read data of the storage device and the additional check codes have errors, and sends error correction request signals if errors exist; the error correction circuits receive the error correction request signals and the decoded data distributed by the arbitration manager, starts the error correction, and calculates the number and the positions of the erroneous data; and the number of the error correction circuits is less than that of channels in the storage device. By flexibly distributing the error correction circuits, the error correction method of the storage device can decrease the number of the error correction circuits and improve the service efficiency of the error correction circuits.

Description

technical field [0001] The invention relates to the field of error correction of storage devices, in particular to an error correction device and method for storage devices. Background technique [0002] NAND flash memory has been more widely used in mass storage devices, such as solid state disk drive SSD (solid state drive). In such high-capacity and high-speed storage devices, in order to improve product performance, multi-channel technology will be used to expand the interface data width of general-purpose NAND flash memory from 8 bits to a higher data bit width, such as 32 bits, 64 bits or higher. When using multi-channel technology, generally one channel needs to be configured with an ECC (Error Control Coding, error control coding) circuit. With the advancement of NAND flash memory technology and technology, the requirements for ECC error correction capability are further increased, so the scale of the ECC circuit also increases exponentially. [0003] Usually, eac...

AI Technical Summary

Problems solved by technology

With the advancement of NAND flash memory technology and technology, the requirements for the error correction capability of ECC circuits are further increased. The way that one channel corresponds to one ECC circuit makes the ECC circuit take up too many resources, which is not conducive to reducing the size of the device. ;In fact, the ECC error correction circuit is not used efficiently due to the low probability of simultaneous errors on multiple channels

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