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Array substrate and manufacturing method

The technology of an array substrate and a manufacturing method is applied in the field of liquid crystal display devices to achieve the effects of preventing light leakage and improving process quality

Active Publication Date: 2015-06-17
BEIJING BOE OPTOELECTRONCIS TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0008] The purpose of the present invention is to provide an array substrate and a manufacturing method to overcome the defects in the prior art due to the inability to effectively form the fractured part of the pixel electrode layer

Method used

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  • Array substrate and manufacturing method
  • Array substrate and manufacturing method

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no. 1 example

[0052] Figure 4 It is a flow chart of the first embodiment of the manufacturing method of the array substrate of the present invention. like Figure 4 As shown, the array substrate manufacturing method of this embodiment includes:

[0053] Step 101 , forming a first metal layer including gate lines and gate electrodes on a glass substrate.

[0054] Step 102, forming a first insulating layer for covering the first metal layer and the substrate on the glass substrate after step 101, and sequentially forming silicon islands on the first insulating layer for forming The sectional pattern of the broken surface and the second metal layer including the data line, the source electrode and the drain electrode, the sectional pattern is separated from the data line by a set distance, and is parallel to the data line.

[0055] Step 103, forming a second insulating layer covering the entire glass substrate on the glass substrate after step 102, and forming a pixel electrode electricall...

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Abstract

The invention relates to an array substrate and a manufacturing method. The method for manufacturing the array substrate comprises a first-time masking process, a second-time masking process and a third-time masking process, wherein in the first-time masking process, a first metal layer containing a grid line and a gate electrode is formed on a glass substrate; in the second-time masking process, a first insulating layer is formed, a silicon island, tangent plane patterns for forming rupture surfaces and a second metal layer containing a data line, a source electrode and a drain electrode are formed on the first insulating layer sequentially, and the tangent plane patterns and the data line are arranged at set intervals and are parallel to one another; and in the third-time masking process, a second insulating layer is formed, a pixel electrode electrically connected with the drain electrode of the second metal layer is formed by a stripping process, and the edge of the pixel electrode is positioned on the tangent plane patterns. The array substrate overcomes the defect that ruptured parts of a pixel electrode layer cannot be formed effectively when the pixel electrode layer is deposited in the prior art, ensures the normal operation of the stripping process in the third-time masking process, and improves the process quality.

Description

technical field [0001] The invention belongs to the field of liquid crystal display devices, and in particular relates to an array substrate and a manufacturing method using a three-time mask process. Background technique [0002] A liquid crystal display device (Liquid Crystal Display, referred to as LCD) is a main flat panel display device (Flat Panel Display, referred to as FPD). Liquid crystal display devices are classified into vertical electric field type liquid crystal display devices and horizontal electric field type liquid crystal display devices according to the direction of an electric field for driving liquid crystals. Horizontal field type liquid crystal display devices are further divided into: Fringe Field Switching (hereinafter referred to as FFS) type liquid crystal display devices and in-plane switching (abbreviated as IPS) type liquid crystal display devices. [0003] figure 1 It is a schematic diagram of the first mask process in the existing array sub...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/84H01L21/768H01L21/027H01L27/12H01L23/528G02F1/1362
Inventor 崔承镇宋泳锡刘圣烈
Owner BEIJING BOE OPTOELECTRONCIS TECH CO LTD