Semiconductor packaging member

A semiconductor and packaging technology, applied in the field of semiconductor packaging, can solve the problem that the bonding degree between the flip chip 14 and the substrate cannot be further improved

Active Publication Date: 2011-01-05
ADVANCED SEMICON ENG INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0003] However, since the primer 20 only contacts the bottom surface 16 of the flip chip 14 , the degree of bonding between the flip chip 14 and the substrate 12 cannot be further improved.

Method used

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  • Semiconductor packaging member
  • Semiconductor packaging member
  • Semiconductor packaging member

Examples

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Embodiment Construction

[0030] Please refer to figure 2 , which shows a cross-sectional view of a semiconductor package according to a preferred embodiment of the present invention. The semiconductor package 100 is, for example, a Flip Chip CSP. The semiconductor package 100 includes a substrate 102 , a semiconductor component 104 , a plurality of component contacts 106 , an encapsulant 108 and a plurality of substrate contacts 110 .

[0031] The substrate 102 has a first surface 118 and a second surface 124 opposite to each other. The semiconductor device 104 is, for example, a flip chip disposed on the first surface 118 . The substrate contacts 110 are, for example, solder balls, conductive pillars or bumps, which are formed on the second surface 124 of the substrate 102 for electrically connecting an external circuit (not shown) and Semiconductor package 100 .

[0032] The device contact 106 is, for example, a solder ball, a bump or a copper pillar, which is disposed between the substrate 102...

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PUM

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Abstract

The invention relates to a semiconductor packaging member which comprises a substrate, a semiconductor assembly, a plurality of assembly contacts, a molding compound and a plurality of substrate contacts, wherein the substrate is provided with a first surface and a second surface which are opposite; the semiconductor assembly is arranged on the first surface; the assembly contacts are electrically connected with the substrate and the semiconductor assembly; the molding compound coats the semiconductor assembly, a part of the molding compound is arranged between the semiconductor assembly and the first surface, the sealing compound comprises a plurality of fillers which account for 85%-89% of the molding compound, and the size of each fillers is between 18 micrometers to 23 micrometers; and the substrate contacts are formed on the second surface.

Description

technical field [0001] The present invention relates to a semiconductor package, and in particular to a semiconductor package filled with a sealing material between a semiconductor component and a substrate. Background technique [0002] Please refer to figure 1 (Prior Art), which shows a cross-sectional view of a conventional semiconductor package. The semiconductor package 10 includes a substrate 12 , a flip chip 14 and an underfill 20 . The primer 20 is filled between the flip chip 14 and the substrate 12 to fix the solder balls 18 of the flip chip 14 and make the flip chip 14 firmly bonded to the substrate 12 . [0003] However, since the primer 20 only contacts the bottom surface 16 of the flip chip 14 , the bonding degree between the flip chip 14 and the substrate 12 cannot be further improved. Contents of the invention [0004] The invention relates to a semiconductor package. A molding compound is filled between the semiconductor component and the substrate. The...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L23/24H01L23/31H01L23/29
CPCH01L2924/15311H01L2224/73204H01L2224/16225H01L2224/32225
Inventor 高崇尧李又儒赖振铭陈正强
Owner ADVANCED SEMICON ENG INC
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