Semiconductor device and fabrication method thereof

Abstract

Provided is an SGT fabrication method for realizing a structure for lowering the resistance of the source, drain and gate, and for obtaining the desired gate length, source and drain shapes and diameter of the columnar semiconductor. Said objectives are realized by a semiconductor device fabrication method characterized by including a step for forming a columnar semiconductor layer of a first conductivity type, a step for forming a semiconductor layer of a second conductivity type at the base of the columnar semiconductor layer of the first conductivity type, a step for forming a gate insulating film and a gate electrode at the perimeter of the columnar semiconductor layer of the first conductivity type, a step for forming an insulating film on the upper part of the gate and on the side wall at the upper part of the columnar semiconductor layer of the first conductivity type, a step for forming an insulating film on the side wall of the gate, a step for forming a semiconductor layer of the second conductivity type on the upper part of the columnar semiconductor layer of the first conductivity type, and a step for forming a compound of a metal and a semiconductor on the semiconductor layers of the second conductivity type formed at the upper part and at the base of the columnar semiconductor layer of the first conductivity type and on the gate.

Description

technical field [0001] The invention relates to a semiconductor device and a manufacturing method thereof. Background technique [0002] Semiconductor integrated circuits, especially integrated circuits using MOS (Metal Oxide Semiconductor; Metal Oxide Semiconductor) transistors, tend to be more highly integrated. Along with this high integration, the miniaturization of MOS transistors used therein has progressed to the nanometer (nano) field. As the miniaturization of MOS transistors progresses, it becomes more difficult to suppress leakage current, and there is a problem that it is difficult to reduce the occupied area of ​​a circuit in order to secure a required amount of current. In order to solve this problem, there is a proposal for a Surrounding Gate Transistor (SGT) in which the substrate arranges the source, gate, and drain in a vertical direction, and the gate surrounds the columnar semiconductor layer. (eg Patent Documents 1, 2, 3). [0003] Patent Document 1: ...

AI Technical Summary

Problems solved by technology

As the miniaturization of MOS transistors progresses, the suppression of leakage current becomes more difficult, and there is a problem that it is difficult to reduce the occupied area of ​​the circuit in order to ensure the required amount of current.

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