Semiconductor process and stackable semiconductor device packages

Abstract

In one embodiment, a manufacturing method includes: (1) applying a first electrically conductive material to an upper surface of a substrate to form first conductive bumps; (2) electrically connecting a semiconductor device to the upper surface of the substrate; (3) applying a molding material to form a molded structure covering the first conductive bumps and the semiconductor device, upper ends of the first conductive bumps being recessed below an upper surface of the molded structure; (4) forming openings adjacent to the upper surface of the molded structure, the openings exposing the upperends of the first conductive bumps; (5) applying, through the openings, a second electrically conductive material to form second conductive bumps; and (6) forming cutting slits extending through the molded structure and the substrate.

Description

technical field [0001] The present invention relates to a semiconductor package structure, in particular, to a stackable semiconductor package structure. Background technique [0002] Electronic products are becoming more and more complex, such as requiring enhanced functionality and smaller size of at least some of the electronic products. While the benefits of increased functionality and smaller size are clear, achieving these benefits can create problems. In particular, electronic products usually require a high density of semiconductor components in a limited space. For example, mobile phones, personal digital assistants, portable computers, and other portable consumer products have limited space available to accommodate processors, memory, and other active or passive components. Relatedly, packaged semiconductor devices often provide marginal protection against environmental conditions and electrical connections for input and output. Packaging semiconductor devices i...

AI Technical Summary

Problems solved by technology

[0004] Although high-density semiconductor components 108 and 114 can be arranged in a predetermined footprint area (Footprint Area), the device 100 still has many disadvantages

In particular, the solder balls that are relatively large and span a distance between the upper package structure 102 and the lower package structure 104, such as the solder balls 124a, 124b, occupy 100% of the upper surface 120 of the substrate unit 112. Valuable space, thus hindering the ability to not only reduce the distance between these balls, but also increase the number of these balls

Also, when the solder balls 124a, 124b may not adhere effectively to the substrate unit 112 of the lower package structure 104 during reflow, the device 100 may suffer from undesirably low stack yields when manufactured.

This improper adhesion is exacerbated by the molding process that forms the package body 116 because molding material may easily overflow and contaminate the surrounding portion of the upper surface 120 .

Additionally, due to the reduced lateral length of the package body 116, the device 100 has a tendency to bend or warp, which can cause sufficient stress on the solder balls 124a, 124b to cause joint failure.

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