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Hardware fault detection debugging code information output method, device and system

A technology for information output and information management devices, which is applied in the fields of hardware error detection and debugging code information output methods, devices and systems, can solve the problems of inconvenient operation and high cost, and achieve the effect of simple operation and reduced complexity

Active Publication Date: 2013-01-02
深圳市新凯来技术有限公司
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This is costly and inconvenient to operate

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  • Hardware fault detection debugging code information output method, device and system
  • Hardware fault detection debugging code information output method, device and system
  • Hardware fault detection debugging code information output method, device and system

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Embodiment Construction

[0028] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without creative efforts fall within the protection scope of the present invention.

[0029] see figure 2 Embodiment 1 of the present invention provides a method for outputting hardware debugging code information, comprising the following steps:

[0030] Step 221: Configure the basic input and output system, so that the bus controller can receive the address of the hardware debugging code information; specifically take the x86 computer system as an example, the BIOS (Basic Input / Output System, basic input system) in the x86 computer system Output ...

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Abstract

The embodiment of the invention discloses a hardware fault detection debugging code information output method, device and system. The method comprises the following steps of: analyzing data entering a bus controller to obtain an analysis result, and judging whether the analysis result comprises a serial port address or a hardware fault detection debugging code information address; if the analysisresult comprises the hardware fault detection debugging code information address, then judging that the analysis result also comprises hardware fault detection debugging code information, and outputting the hardware fault detection debugging code information through a serial port controller. By outputting a fault detection debugging code by multiplexing the built-in serial port controller in the system, the data processing speed of a storage is increased to reduce the cost of hardware fault detection, the complexity of hardware and the cost of a single board is reduced, and the hardware detection operation is easy, convenient and feasible.

Description

technical field [0001] The invention relates to electronic devices, in particular to a method, device and system for outputting hardware error detection and debugging code information. Background technique [0002] In an x86 computer system, the BIOS (Basic Input / Output System, basic input and output system) is started after booting. The BIOS handles many important tasks such as the startup of the x86 system, compatibility between components, and program management. As long as the power switch is pressed to start the host, the BIOS will start to take over all the self-test work of the system startup. [0003] The system first uses the POST (Power On Self Test) program to check each internal device (this process will be described separately below). Usually a complete POST self-test will include testing the CPU, memory, ROM, motherboard, CMOS memory, serial and parallel ports, display card, storage system and keyboard, etc. Once a problem is found during the self-test, the s...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/22
Inventor 朱晓明王慧
Owner 深圳市新凯来技术有限公司