Method for etching silicon wafer

A technology of silicon wafer and etching gas, which is applied in the manufacture of electrical components, semiconductor/solid-state devices, circuits, etc., can solve the problems of increasing the power maintenance time of the upper and lower electrodes, limited effect, and affecting the etching result, so as to avoid etching The effect of defects

Active Publication Date: 2012-10-31
BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the effect of this method is limited. If you want to prolong the pumping time of the molecular pump, you must increase the power maintenance time of the upper and lower electrodes, so that the plasma will continue to etch the silicon substrate, thus affecting the previously scheduled etching results.

Method used

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  • Method for etching silicon wafer
  • Method for etching silicon wafer
  • Method for etching silicon wafer

Examples

Experimental program
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Embodiment

[0025] This embodiment is an STI process applying the etching method of the present invention. figure 2 It is the process flow chart of this embodiment. Such as figure 2 As shown, this embodiment includes the following steps:

[0026] S21, hard mask etching, etching SiNx. The condition parameters are: pressure 8mT; upper electrode power 600W, lower electrode power 90W; etching gas is CF 4 and CH 2 f 2 , the flow rate is 15 sccm; this step is to perform endpoint detection to judge whether the etching step is completed, and if the detection is passed, proceed to the next step.

[0027] S22, over etching, etching, high selectivity etching to remove polysilicon. The condition parameters are: pressure 15mT; upper electrode power 450W, lower electrode power 100W; etching gas is CF 4 and CH 2 f 2 , the flow rate is 30sccm; the duration is 20S.

[0028] S23. Transition step. Since in the two etching steps of S21 and S22, the etching gas used includes CH 2 f 2 , easy to ...

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PUM

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Abstract

The invention discloses a method for etching a silicon wafer, relating to the field of semiconductor chip processing technique, aiming at reducing etching defect caused by particle attachment. The etching method is characterized in that a transitional step that flow of etching gas is reduced and inert gas is added under the conditions that preset upper electrode power, lower electrode power and pressure is added after an etching step for producing by-products in the etching process; after the transitional step is completed, the etching gas is removed, and the inert gas is used for washing, soas to wash away the by-products produced in the etching process and particles suspended in plasma after particles in an etching chamber wall are bombarded by the plasma. The invention can be applied to the etching process of semiconductor silicon wafers.

Description

technical field [0001] The invention relates to a semiconductor chip processing technology, in particular to a silicon wafer etching method. Background technique [0002] In the silicon wafer etching process, the cleanliness of the silicon wafer surface before and after etching largely determines the yield rate of the chip. However, the surface of the silicon wafer is not clean due to the process by-products generated by the etching process falling on the surface of the silicon wafer and the particles in the chamber wall being bombarded by the plasma and falling on the surface of the silicon wafer during the etching process. , there are often particles. This situation is more obvious in etching processes that are prone to produce obvious by-products, such as STI (Shallow Trench Isolation) process / Etchback (etching back) process. These particles will prevent the smooth progress of etching during the etching process and become a barrier layer for local etching, thereby gener...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L21/3065
Inventor 朱哲渊
Owner BEIJING NAURA MICROELECTRONICS EQUIP CO LTD
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