Device and method for calibrating capacitor array type successive-approximation analog-to-digital converter
A technology of analog-to-digital converters and capacitor arrays, which is applied in the calibration field of capacitor array-type successive approximation analog-to-digital converters, and can solve problems such as prolonging the gap between two comparisons, affecting the conversion speed, and reducing the conversion rate
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Publication Date
- 2011-08-24
Smart Images
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Abstract
Description
technical field
[0001] The invention belongs to the field of mixed-signal integrated circuit design, and particularly relates to a calibrating method of a capacitance array type successive approximation analog-to-digital converter, which can compensate capacitance mismatch caused by process deviation. Background technique
[0002] With the development of the information industry, the digital signal processing technology is changing with each passing day, and the analog-to-digital / digital-to-analog (A / D, D / A) converter as a bridge connecting the analog and digital worlds has also been more and more widely used. With the improvement of digital signal processing speed, it will inevitably put forward high-speed and high-precision requirements for analog-to-digital / digital-analog converters; at the same time, the vigorous development of portable consumer electronics and medical equipment also requires analog-to-digital / digital-analog converters. requirements for low power consump...
Examples
Embodiment Construction
[0021] The present invention proposes a calibrating device and method for a capacitance array type successive approximation analog-to-digital converter, combined below Image 6 and Figure 7 Describe the working process of the device in detail.
[0022] The calibrating device of a kind of capacitance array type successive approximation analog-to-digital converter that the present invention proposes (see Image 6The part marked with a dotted line box) includes a capacitance measurement circuit C-M, a static memory SRAM and a corresponding control circuit; on this basis, a logical operation unit ALU connected between the capacitance measurement circuit and the static memory is added; Image 6 Outside the dotted line box is shown the capacitor array successive approximation analog to digital converter to be calibrated which is composed of capacitor array digital to analog converter, bias clock circuit, comparator CMP and successive approximation logic SAR-Logic.
[0023] The sp...