Electrostatic discharge protector and electrostatic discharge protection circuit
An electrostatic discharge protection and circuit technology, applied in the direction of circuits, electrical components, electric solid devices, etc., can solve problems such as integrated circuit damage, and achieve the effect of preventing latch-up and avoiding damage to integrated circuits
Active Publication Date: 2013-03-27
VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION +1
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Problems solved by technology
Especially as the size continues to shrink down to the sub-micron level, the gate oxide layer of metal oxide semiconductors is getting thinner and thinner, and integrated circuits are more likely to be damaged by electrostatic discharge phenomena
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[0021] In order to make the features and advantages of the present invention more comprehensible, preferred embodiments are listed below, together with the accompanying drawings, as follows:
[0022] Figure 1A It is a partial structural schematic diagram of the electrostatic discharge protection circuit of the present invention. As shown in the figure, the ESD protection circuit 10 includes a resistor R1 , a capacitor C1 and an ESD protection device 100 . Since the present invention is not characterized by the structure of resistor R1 and capacitor C1, Figure 1A Only the equivalent schematic diagram of resistor R1 and capacitor C1 is shown.
[0023] As shown in the figure, the ESD protection device 100 includes a substrate 111, wells 121, 122, a body 112, doping regions 131, 132, 141, 142, gate 151, 152.
[0024] The substrate 111 has a first conductivity type. Both the well regions 121 and 122 have a second conductivity type and are respectively formed in the substrate 1...
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The invention discloses an electrostatic discharge protector and an electrostatic discharge protection circuit. The electrostatic discharge protector comprises a substrate, a first well, a second well, a first doping region, a second doping region, a third doping region, a fourth doping region, a body, a first grid, and a second grid. The substrate has a first conductive type. The first well and the second well have second conductive types and are formed in the substrate. The first doping region has a third conductive type and is formed in the first well. The body has a first conductive type and is formed among the substrate, the first well and the second well. The second doping region has a third conductive type and is formed in the body. The first grid controls the first doping region to be electrically connected with the body. The third doping region has a fourth conductive type and is formed in the body. The fourth doping region has a fourth conductive type and is formed in the second well. And the second grid controls the third doping region to be electrically connected with the fourth doping region. According to the electrostatic discharge protector and an electrostatic discharge protection circuit provided in the embodiment of the invention, a latchup phenomenon can be prevented from happening, so that damage on an integrated circuit can be avoided.
Description
technical field [0001] The present invention relates to an electrostatic discharge protection device, in particular to an electrostatic discharge (ESD) protection device capable of preventing latchup from occurring. Background technique [0002] Component damage caused by Electrostatic Discharge has become one of the most important reliability issues for integrated circuit products. Especially as the size continues to shrink down to the sub-micron level, the gate oxide layer of metal oxide semiconductors is getting thinner and thinner, and integrated circuits are more likely to be damaged by electrostatic discharge phenomena. In order to prevent the ESD phenomenon from destroying the integrated circuit, a general solution is to install an ESD protection device in the integrated circuit. Contents of the invention [0003] The present invention provides an electrostatic discharge protection device, comprising a substrate, a first well area, a second well area, a first diffu...
Claims
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IPC IPC(8): H01L27/04H01L29/06
Inventor 柯明道许哲纶陈稳义周业宁黄晔仁
Owner VANGUARD INTERNATIONAL SEMICONDUCTOR CORPORATION