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Element isolation structure of semiconductor and method for forming the same

An element isolation and semiconductor technology, applied in the field of element isolation structure and its formation, can solve problems such as defects, uneven photosensitive film, and lack of gap filling.

Active Publication Date: 2012-02-01
KEY FOUNDRY CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0019] This remaining portion of the photosensitive film hinders etching during the subsequent etching process for forming shallow trenches, which causes the peripheral portion of the remaining portion of the photosensitive film to be etched away, thereby creating a notch
[0020] Furthermore, according to the related art method of forming an element isolation structure, when a photosensitive film for forming a shallow trench is coated after forming a deep trench, sufficient gap filling is not achieved because the photosensitive film is coated by spin coating
Therefore, voids are generated, resulting in defective coatings
That is, because the depth of the deep trench is very deep, it results in defective coating such as voids, so materials such as photosensitive film (PR) are not uniformly filled on top of the entire substrate

Method used

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  • Element isolation structure of semiconductor and method for forming the same
  • Element isolation structure of semiconductor and method for forming the same
  • Element isolation structure of semiconductor and method for forming the same

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Embodiment Construction

[0037]An element isolation structure of a semiconductor device and a method for forming the element isolation structure according to exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. For brief description with reference to the drawings, the same or equivalent components will be provided with the same reference numerals, and descriptions thereof will not be repeated.

[0038] figure 2 is a cross-sectional view of an element isolation structure of a semiconductor device according to the present disclosure.

[0039] Such as figure 2 As shown in , the element isolation structure 100 of a semiconductor device may include: a semiconductor substrate 101 having an inactive region and an active region defined on the semiconductor substrate 101; a deep trench 121 formed in the semiconductor substrate 101; a shallow trench 131 , formed in the semiconductor substrate 101 and overlapping with the deep trench 121...

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Abstract

Disclosed are an element isolation structure of a semiconductor device and a method for forming the same, the method including preparing a semiconductor substrate having an inactive region and an active region defined thereon, forming a first hard mask on the semiconductor substrate, exposing the inactive region of the semiconductor substrate by patterning the first hard mask, forming a second hard mask on the entire surface of the semiconductor substrate including the first hard mask, forming a deep trench in the semiconductor substrate by patterning the second hard mask and the semiconductor substrate, removing the patterned second hard mask, forming a shallow trench overlapped with the deep trench by patterning the semiconductor substrate using the first hard mask as a mask, forming an insulation film on the entire surface of the substrate including the shallow trench and the deep trench, filling the shallow trench and the deep trench by forming an element isolation film on the insulation film, and forming an element isolation film pattern in the deep trench and the shallow trench by selectively removing the element isolation film.

Description

technical field [0001] The present disclosure relates to element isolation of a semiconductor device, and in particular, to an element isolation structure of a semiconductor device capable of forming the element isolation structure without any defect by using deep trenches and shallow trenches and a method of forming the same. Background technique [0002] Recently, element isolation for high voltage devices among semiconductor devices is classified into a junction isolation method and a deep trench isolation method. Recently, in order to reduce the size and improve isolation characteristics, element isolation is achieved by deep trench isolation. For devices using isolation technology under the 0.25μm CMOS design rule, the trenches of the high-voltage device and the trenches of the low-voltage device have different trench depths, so a double-depth trench with deep trenches and shallow trenches should be formed groove. [0003] will refer to Figure 1A to Figure 1I A metho...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/762H01L29/06
CPCH01L21/76232
Inventor 姜良范
Owner KEY FOUNDRY CO LTD
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