Preparation method for high voltage complementary metal oxide semiconductor
A technology of oxide semiconductors and complementary metals, applied in semiconductor/solid-state device manufacturing, electrical components, circuits, etc., can solve circuit output voltage instability, uneven concentration distribution of P-type wells, and unstable parameters of N-type consumption devices, etc. problem, to achieve the effect of improving stability and parameter stability
Active Publication Date: 2013-10-16
FOUNDER MICROELECTRONICS INT
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[0003] In the traditional semiconductor chip manufacturing process, the P-type well and the P-type well resistance are formed at the same time through a well implantation. In order to meet the resistance requirements of the P-type well resistance, the concentration of the P-type well will be affected at the same time. The concentration will affect the parameters of N-type metal oxide semiconductor (NMOS) and the parameters of N-type depletion, especially when the concentration of P-type well is too high, the uneven concentration distribution of P-type well will easily lead to the parameter of N-type depletion. stable, making the output voltage of the whole circuit unstable
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[0067] In order to accurately adjust the P-type well resistance and obtain a P-type well with uniform concentration distribution, a preferred embodiment of the present invention proposes a method for manufacturing a P-type well and a P-type well resistance. The following describes the preferred embodiment of the present invention in conjunction with the accompanying drawings. The main realization principles, specific implementation process and corresponding beneficial effects that can be achieved are described in detail.
[0068] The relevant content of "Semiconductor Device Physics and Technology" (written by Shi Min) and "The Science and Engineering of Microelectronic Fabrication" (written by Stephen A.Campbell) are introduced here to help those skilled in the art better understand the present invention, A partial realization process of the manufacturing method of the P-type well and the P-type well resistor.
[0069] In a preferred embodiment of the present invention, the s...
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The invention relates to a preparation method for high voltage complementary metal oxide semiconductor, in particular to a preparation method for P-type well and P-type well resistance of high voltage complementary metal oxide semiconductor. The invention provides a preparation method for high voltage complementary metal oxide semiconductor, wherein the P-type well and the P-type well resistance are formed respectively. According to the technical solution, the P-type well resistance uses an independent mask plate, so that the P-type well resistance can be accurately adjusted; and compared with traditional technology, the P-type well does not need to consider the requirement of the P-type well resistance, and can obtain well with uniform concentration by using lower concentration, so that product performance is improved.
Description
technical field [0001] The invention relates to a preparation method of a high-voltage complementary metal oxide semiconductor, in particular to a preparation method of a high-voltage complementary metal oxide semiconductor P-type well and a P-type well resistance. Background technique [0002] The high-voltage Metal Gate CMOS (metal gate CMOS) widely used at present all use N-type substrate and P-type single well process. [0003] In the traditional semiconductor chip manufacturing process, the P-type well and the P-type well resistance are formed at the same time through a well implantation. In order to meet the resistance requirements of the P-type well resistance, the concentration of the P-type well will be affected at the same time. The concentration will affect the parameters of N-type metal oxide semiconductor (NMOS) and the parameters of N-type depletion, especially when the concentration of P-type well is too high, the uneven concentration distribution of P-type we...
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IPC IPC(8): H01L21/8238H01L21/265
Inventor 李如东
Owner FOUNDER MICROELECTRONICS INT