Vertical coplanar waveguide with tunable characteristic impedance, design structure and method of fabricating the same

Abstract

An on-chip vertical coplanar waveguide with tunable characteristic impedance, a design structure, and a method of making the same. An on-chip transmission line (60) includes a signal line (65), an upper ground line (70) spaced apart from and above the signal line, and a lower ground line (75) spaced apart from and below the signal line. The signal line, the upper ground line and the lower ground line are substantially vertically aligned in a dielectric material (80).

Description

technical field [0001] The present invention generally relates to on-chip transmission lines, and more particularly to on-chip vertical coplanar waveguides with tunable characteristic impedance, design structures and fabrication methods thereof. Background technique [0002] The performance of on-chip interconnects (eg, on-chip transmission lines) is an important factor affecting overall chip performance. On-chip transmission lines are typically modeled before production begins to minimize design time. Due to the importance of on-chip transmission lines to overall chip performance, accurate models of on-chip transmission lines are required when evaluating high-performance designs. Any errors in the transmission line model can lead to inaccurate estimates of the characteristic impedance and / or attenuation associated with the on-chip transmission line. Chips produced based on incorrect modeling may not perform in the manner required by design specifications, and thus be an i...

AI Technical Summary

Problems solved by technology

Therefore, instead of modeling, most designers rely on hardware measurements of fabricated prototypes to validate chip designs, which lengthens design cycles and time-to-market

Images