Liquid crystal display apparatus
A technology of liquid crystal display devices and thin film transistors, which can be used in static indicators, nonlinear optics, instruments, etc., and can solve problems such as grayscale inversion
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Embodiment approach 1
[0084] Next, a first embodiment of the liquid crystal display device of the present invention will be described. figure 1 A schematic diagram of the liquid crystal display device 100 of this embodiment is shown. The liquid crystal display device 100 includes: a back substrate 120 having pixel electrodes 124 and an alignment film 126 provided on an insulating substrate 122; a front substrate 140 having a counter electrode 144 and an alignment film 146 provided on an insulating substrate 142; and a liquid crystal The layer 160 is provided between the back substrate 120 and the front substrate 140.
[0085] Polarizing plates 128, 148 and retardation plates 129, 149 are provided on the back substrate 120 and the front substrate 140, respectively. The two polarizing plates 128, 148 are arranged to face each other with the liquid crystal layer 160 interposed therebetween. The transmission axes (polarization axes) of the two polarizing plates 128, 148 are arranged orthogonal to each ot...
Embodiment approach 2
[0259] In the above description, the bright sub-pixels and the dark sub-pixels are arranged in a grid pattern, but the present invention is not limited to this.
[0260] Below, refer to Picture 20 The second embodiment of the liquid crystal display device of the present invention will be described. The liquid crystal display device 100D of this embodiment has the same configuration as the above-mentioned liquid crystal display device except that two regions of dark sub-pixels are provided with bright sub-pixels interposed therebetween. To avoid cumbersomeness, redundant descriptions are omitted.
[0261] Picture 20 A schematic plan view of the back substrate 120 in the liquid crystal display device 100D is shown. In the liquid crystal display device 100D, the gate wiring G and the source wiring S are also arranged in a matrix, and the storage capacitor wiring CS is arranged in parallel with the gate wiring G. In addition, the storage capacitor wiring CS is provided so as to corr...
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