A kind of high voltage resistant tunneling transistor and its preparation method

Abstract

Provided are a tunnel field-effect transistor and a manufacturing method therefor. The tunnel field-effect transistor comprises: a semiconductor substrate (1); a channel region (2), where the channel region (2) is formed in the semiconductor substrate (1), and where the channel region (2) has formed therein one or multiple divider structures (3); a first buried layer (60) and a second buried layer (62), where the first buried layer (60) and the second buried layer (62) are formed in the semiconductor substrate (1) and are arranged respectively at two sides of the channel region (2), where the first buried layer (60) is of a first non-heavily doped type, and where the second buried layer (62) is of a second non-heavily doped type; a source region (7) and a drain region (8), where the source region (7) and the drain region (8) are formed in the semiconductor substrate (1) and are arranged respectively on the first buried layer (60) and on the second buried layer (62), where the source region (7) is of a first heavily-doped type, and where the drain region (8) is of a second heavily-doped type; and, a gate dielectric layer (4) and a gate electrode (5), where the gate dielectric layer (4) is formed on the one or multiple divider structures (3), and where the gate electrode (5) is formed on the gate dielectric layer (4).

Description

technical field [0001] The invention relates to the technical field of semiconductor design and manufacture, in particular to a tunneling transistor with high breakdown voltage and a preparation method thereof. Background technique [0002] For MOSFET (Metal Oxide Semiconductor Field Effect Transistor) integrated circuits, the off-state leakage current rises rapidly as the size of the integrated circuit shrinks. In order to reduce the leakage current, thereby further reducing the power consumption of the device and improving the withstand voltage capability of the device, and Tunneling transistors (TFETs) with different operating principles from MOSFETs are widely used. At present, the drain and the source of a conventional tunneling transistor are located on the same plane of the semiconductor substrate. The tunneling transistor with this structure has poor high voltage resistance, large on-resistance, and high power consumption. Therefore, how to improve the withstand vol...

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Problems solved by technology

[0003] The purpose of the present invention is to at least solve one of the above-mentioned technical defects, especially to solve the shortcomings of existing tunneling transistors such as poor high voltage resistance, large on-resistance, and high power consumption.

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