Eureka AIR delivers breakthrough ideas for toughest innovation challenges, trusted by R&D personnel around the world.

Three-level zero common-mode voltage modulation method based on DSP (digital signal processor) and CPLD (complex programmable logic device)

A technology of common-mode voltage and modulation method, which is applied in the field of three-level zero-common-mode voltage modulation, and can solve problems such as failure to fundamentally eliminate common-mode voltage

Inactive Publication Date: 2014-08-13
HEFEI UNIV OF TECH
View PDF3 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

These methods can suppress the common-mode voltage to varying degrees, but none of them can fundamentally eliminate the common-mode voltage

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Three-level zero common-mode voltage modulation method based on DSP (digital signal processor) and CPLD (complex programmable logic device)
  • Three-level zero common-mode voltage modulation method based on DSP (digital signal processor) and CPLD (complex programmable logic device)
  • Three-level zero common-mode voltage modulation method based on DSP (digital signal processor) and CPLD (complex programmable logic device)

Examples

Experimental program
Comparison scheme
Effect test

Embodiment Construction

[0066] Such as Figure 7 Shown, a kind of three-level zero-common-mode voltage modulation method based on DSP and CPLD comprises the following steps:

[0067] (1) Use DSP1 to perform two-level modulation to modulate two complementary 6-way two-level PWM signals, and mark the signals as EPWM1 ​​to EPWM6, where EPWM1 ​​and EPWM2 are complementary, EPWM3 and EPWM4 are complementary, and EPWM5 and EPWM6 are complementary;

[0068] (2), the 6-way two-level PWM signals generated by DSP1 are passed to CPLD2 through external pins, and CPLD2 adjusts the 6-way two-level PWM signals to generate 12-way PWM signals, and mark the 12-way signals respectively For PWM1 to PWM12;

[0069] Assign values ​​to PWM1-PWM4: When the EPWM1 ​​and EPWM3 signals generated by DSP1 in step (1) are not low at the same time, implement the following distribution method: PWM1 takes the signal of EPWM4, PWM2 takes the signal of EPWM1, and PWM3 takes the signal of EPWM3 Signal, PWM4 takes the signal of EPWM2; ...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

PUM

No PUM Login to View More

Abstract

The invention discloses a three-level zero-common-mode voltage modulation method based on DSP and CPLD. By distributing and adjusting the PWM pulse wave modulated by two levels, a set of intermediate voltages effective for three-level inverters is generated. In the vector switch state, the combination of three-level vectors is used to directly control the three-level main circuit, so as to achieve the purpose of outputting the common mode voltage to zero. The modulation method of the present invention is simple and easy to implement, does not require any external hardware circuit, is suitable for any modulation wave, outputs a common mode voltage of zero, eliminates the leakage current caused by the common mode voltage and leakage capacitance, and fundamentally eliminates the common mode voltage .

Description

technical field [0001] The invention relates to a three-level zero-common-mode voltage modulation method, in particular to a three-level zero-common-mode voltage modulation method based on DSP and CPLD. Background technique [0002] With the rapid development of power electronics and computer technology, inverters are widely used in high-power fields. Especially with the continuous improvement and perfection of the three-level technology, the three-level inverter has become a dominant position in high-power applications. Compared with the traditional two-level converter, the three-level converter has the advantages of high withstand voltage, low switching loss, and low output harmonics, and shows obvious advantages in high-voltage and high-power applications, so it has caused people's attention. However, there is a common mode voltage problem in the three-level converter. Due to the existence of the common mode voltage, an uncontrollable leakage current is generated throu...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to View More

Application Information

Patent Timeline
no application Login to View More
Patent Type & Authority Patents(China)
IPC IPC(8): H02M7/487H02M1/088
CPCH02M7/487H02M7/5395H02M1/123
Inventor 王付胜张兴何立灿李飞刘淳刘芳
Owner HEFEI UNIV OF TECH
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Eureka Blog
Learn More
PatSnap group products

Browse by: Latest US Patents, China's latest patents, Technical Efficacy Thesaurus, Application Domain, Technology Topic, Popular Technical Reports.

© 2024 PatSnap. All rights reserved.Legal|Privacy policy|Modern Slavery Act Transparency Statement|Sitemap|About US| Contact US: help@patsnap.com