Patents
Literature
Patsnap Eureka AI that helps you search prior art, draft patents, and assess FTO risks, powered by patent and scientific literature data.

207 results about "Three level inverter" patented technology

Method for diagnosing open-circuit fault of IGBT (Insulated Gate Bipolar Translator) of T-type three-level inverter and fault of current sensor

The invention discloses a method for diagnosing an IGBT open-circuit fault and a current sensor fault of a T-type three-level inverter, belongs to the technical field of inverter fault diagnosis, and is used for solving the problems of diagnosis and positioning when a three-level T-type inverter IGBT switch tube and a sensor have faults. Comprising the following steps: classifying and marking and numbering fault types of an open-circuit fault of a T-type three-level inverter IGBT and a fault of a current sensor; fault samples are collected and divided into a training set and a test set according to the proportion of 7: 3; a TCN-LSTM-SelfAction fault diagnosis model is constructed, and model training is carried out by using the training set; the trained model is used for evaluating the accuracy of fault type diagnosis of the training set and the test set. According to the diagnosis method, the fault types and the fault positions of the IGBT open-circuit fault and the current sensor fault can be diagnosed at the same time, the TCN and the LSTM are selected to be combined, local information and global relation of fault features can be captured at the same time, and meanwhile, the performance of a model is improved by combining a self-attention mechanism in the LSTM, and the accuracy is improved.
Owner:JIYUAN BEICHEN ELECTRIC POWER SURVEY & DESIGN CO LTD +1

Dual-tracking model predictive control method for three-level inverter and inverter

The invention discloses a three-level inverter dual-tracking model prediction control method and an inverter, and the method comprises the steps: constructing an integral sliding mode observer, and obtaining a current prediction value and a lumped disturbance estimation value through the integral sliding mode observer; calculating a voltage error of the inverter, and substituting the voltage error into the PI controller to obtain a voltage tracking control item; based on the voltage tracking control term, a switching state that minimizes the cost function is selected to control the inverter. The integral sliding mode observer is configured to calculate a current prediction error between a current prediction value of a current control period and a system output current, introduce an integrator to track the current prediction error, and generate an error function based on an output result of the integrator and the current prediction error. And feeding back a current predicted value and a lumped disturbance estimated value of the next control period through an error function. According to the invention, the method can achieve the quick estimation of the operation state of the inverter and the robust compensation of disturbance, reduces the steady-state tracking error, and reduces the total harmonic distortion of the inverter.
Owner:ZHEJIANG UNIV

Method and system for cooperatively suppressing common-mode voltage and current harmonics of coupled three-level inverter

The present invention provides a method for cooperatively suppressing a common-mode voltage and current harmonics of coupled three-level inverters, comprising: based on amplitude and phase angle of reference voltage vector, determining sector and region in which the reference voltage vector is located; selecting four basic voltage vectors with low common-mode voltage amplitudes to synthesize the reference voltage vector; writing volt-second balance equation based on selected basic voltage vectors, and calculating duty cycles thereof; and based on sector and region in which reference voltage vector is located, set value of voltage difference across capacitors on direct current side, and actual value of voltage difference across capacitors on direct current side, (1) updating duty cycles of basic voltage vectors, to realize separate control of capacitor voltage; and (2) designing and converting switching sequence into PWM drive signal of power switch, to control the coupled three-level inverter to operate.
Owner:SHANDONG JIANZHU UNIV

Fault diagnosis method, device and equipment of NPC three-level inverter and medium

The invention discloses a fault diagnosis method, device and equipment for an NPC three-level inverter and a medium, and relates to the technical field of inverter fault diagnosis, and the method comprises the steps: building a fault stator current analysis model according to a fault stator current change rule of the inverter; a fault phase and a fault bridge arm are extracted and positioned by using a sliding window averaging method; and calculating and setting a fault positioning reference value under an ideal condition, and comparing the fault positioning reference value with a fault positioning actual value under an actual condition to position a faulted IGBT (Insulated Gate Bipolar Translator). A fault stator current analysis model is established to simulate a set current change condition under an ideal condition, a fault positioning reference value is calculated, and whether an actual fault condition is consistent with a set ideal fault condition is distinguished by a deviation between the fault positioning reference value and a fault positioning actual value of an actual condition, and whether a fault is an inner pipe or an outer pipe is positioned. During calculation, a current mean value from a fault moment to a first zero-crossing moment is utilized, a fault IGBT can be positioned in a fundamental wave period, and fault diagnosis and positioning can be quickly and efficiently carried out.
Owner:TIANJIN POLYTECHNIC UNIV

Three-level SNPC inverter model-free strong-robustness predictive control method and system

The invention relates to the field of three-level inverters, and particularly discloses a model-free strong-robustness predictive control method and system for a three-level SNPC inverter, and the method comprises the steps: carrying out the real-time sampling and coordinate transformation of the inverter, and obtaining the current and voltage components under a two-phase static coordinate system; establishing a hyper-local model, enabling the system parameter deviation and the external disturbance to be uniformly equivalent to lumped disturbance, and designing a full-order sliding-mode observer for real-time estimation; calculating a reference voltage vector based on the disturbance estimation value and the extrapolated reference current; and an optimal double-vector combination is selected through space vector optimization, action time is solved, redundant small vectors are selected according to midpoint voltage deviation, and PWM driving signals are generated. According to the method, excellent current tracking performance and low harmonic distortion can still be kept under the conditions of parameter mismatch and working condition change, meanwhile, neutral-point potential balance on the direct-current side is achieved, and the method has the advantages of being small in calculation amount, high in robustness, easy to achieve in engineering and the like.
Owner:SHANDONG UNIV

Multi-loop anti-interference ride-through control system and method for high-voltage three-level inverter

The invention discloses a multi-loop anti-interference ride-through control system and method for a high-voltage three-level inverter, and is suitable for a three-phase T-type three-level grid-connected inverter. The system comprises a direct current side power supply circuit, an inversion main circuit, a filtering grid-connected circuit, a signal sampling and conditioning circuit, a multi-loop cooperative controller and a PWM driving and protecting circuit. According to the control method, a robust synchronous reference is provided through an outer ring virtual synchronous generator strategy; a middle ring adopts a virtual impedance model containing a high-frequency compensation item to selectively suppress switching noise; the inner ring adopts a quasi-proportional resonance controller to realize fundamental current zero-static-error tracking; the modulation layer dynamically optimizes a discontinuous pulse width modulation strategy based on a real-time EMI index; and the rings are switched to a low-voltage ride-through mode in cooperation when a fault occurs. On the premise of not increasing hardware, the anti-interference capability, the current quality and the ride-through stability of the inverter under the working conditions of strong electromagnetic interference and power grid drop are effectively improved.
Owner:HANGZHOU DIANZI UNIV +1

Vector reconstruction harmonic suppression method for permanent magnet synchronous motor powered by three-level inverter

The invention discloses a vector reconstruction harmonic suppression method for a three-level inverter power supply permanent magnet synchronous motor, and relates to the technical field of motor harmonic and noise suppression. Calculating action time of three basic vectors, selecting the three basic vectors, adjusting an original vector synthesis sequence in a single carrier period into a vector reconstruction synthesis sequence, calculating three time nodes of a fifth-segment sequence and a sixth-segment sequence according to the original vector synthesis sequence, and calculating the time nodes of the fifth-segment sequence and the sixth-segment sequence; the action duration of the two basic vectors after adjustment is calculated according to the vector reconstruction synthesis sequence, the numerical value of a switching time node of a three-level inverter switching tube is updated according to the action duration, and the assigned value of a time register is calculated and updated in a circulating mode in the operation process of the permanent magnet synchronous motor system. And generating a PWM (Pulse Width Modulation) driving signal to control a three-level inverter switching tube to drive a motor. Improvement is carried out based on a traditional SVPWM technology, the high-frequency harmonic performance of the three-level inverter and the motor driving system can be remarkably improved, system cost and operation difficulty do not need to be increased, and the method is simple and easy to implement.
Owner:HARBIN INST OF TECH

Optimized virtual vector modulation strategy of T-type three-level inverter

The invention discloses an optimized virtual vector modulation strategy of a T-type three-level inverter, which is characterized in that a sector is re-divided based on the virtual vector modulation strategy, a synthesis mode of a virtual vector is optimized, a low-amplitude common-mode voltage vector is adopted to synthesize the virtual vector, on one hand, common-mode voltage generated by the inverter can be inhibited, and on the other hand, the common-mode voltage generated by the inverter can be inhibited; and on the other hand, the optimized modulation method does not influence the neutral point potential, the smoothness of the direct output voltage of the inverter is improved, the voltage quality is improved, and the method has the advantages of low harmonic content of the output current and the like. In addition, the method solves the problems of inverter output voltage distortion, common-mode voltage spike and the like caused by a dead zone effect through a voltage vector compensation method, and has guiding significance for improving the reliability of a photovoltaic system and a micro-grid system.
Owner:UNIV OF ELECTRONICS SCI & TECH OF CHINA

Multi-target hybrid modulation method, system and equipment for T-type three-level inverter

The invention belongs to the technical field of electronic power, and particularly relates to a multi-target hybrid modulation method, system and equipment for a T-type three-level inverter, and the method comprises the steps: firstly, judging whether the inverter operates at an extremely low modulation degree or not; if yes, calculating theoretical midpoint current of the DPWM1 mode and the DPWM3 mode in parallel, and expanding midpoint current corresponding to four hybrid modulation modes generated after a VSVPWM sequence is introduced in the two modes respectively; then dynamically selecting an optimal hybrid modulation mode or returning to a basic DPWM mode according to the numerical relationship between the real-time calculated midpoint compensation current and each midpoint current; and finally, a three-phase double-modulation wave is generated, and PWM signals for driving all power switches are output after carrier wave comparison. According to the method, multi-objective optimization of the neutral point potential, the switching loss and the output waveform under the extreme working condition is realized, and the stability and the performance of the system are remarkably improved.
Owner:HEFEI UNIV OF TECH

T-type inverter fault diagnosis method based on CWGAN and TCN-SE network

The invention discloses a T-type inverter fault diagnosis method based on a CWGAN and a TCN-SE network, relates to the fault diagnosis technology of power electronic equipment, and provides the scheme for solving the problem that the diagnosis precision is limited in the prior art. Acquiring three-phase current signal data output by the load side of the T-type three-level inverter; performing time sequence feature extraction on the three-phase current signal data through a TCN-SE network; wherein the TCN-SE network comprises a plurality of time sequence convolution modules, an SE attention module and a full connection layer, and the time sequence convolution modules adopt a one-dimensional convolution kernel to perform feature extraction on an input sequence; enhancing the original fault sample based on the CWGAN; inputting the features extracted by the TCN-SE network into a classifier for fault identification, wherein the classifier outputs the probability of each type of fault by adopting a Softmax function; the method has the advantages that the fault diagnosis accuracy is improved; the robustness and generalization ability are enhanced; self-adaptive extraction of time sequence features is realized; the small sample training effect is optimized; the diagnosis efficiency is improved.
Owner:SOUTH CHINA UNIV OF TECH

Common-mode voltage suppression method for three-level four-leg inverter

The invention provides a common-mode voltage suppression method for a three-level four-leg inverter, and relates to the technical field of power electronics. Aiming at the problem that the common-mode voltage is relatively high in the application of the existing three-level four-bridge-arm inverter, the invention proposes that two bridge arms in four bridge arms of the inverter are subjected to anti-sequence operation, so that the common-mode voltage is effectively inhibited; the method comprises the following steps: calculating terminal voltages of four bridge arms, selecting a bridge arm for performing desequencing operation based on a desequencing operation bridge arm pairing rule, and adjusting a modulation waveform of each bridge arm; compared with a traditional three-level inverter modulation method, simulation comparison analysis shows that the common-mode voltage is remarkably reduced; the common-mode voltage performance comprehensive comparison of the six anti-sequence modes shows that the anti-sequence operation used in the method has the optimal performance.
Owner:NORTHEASTERN UNIV AT QINHUANGDAO

Three-level inverter DPWM and SVPWM smooth switching method, system, device and medium

The invention relates to the technical field of energy storage converters, in particular to a three-level inverter DPWM and SVPWM smooth switching method and system, a medium and equipment, and the method comprises the steps: determining a current modulation mode which comprises the SVPWM and the DPWM; a first modulation coefficient and a second modulation coefficient are set, the first modulation coefficient corresponds to the weight of the SVPWM common-mode voltage, the second modulation coefficient corresponds to the weight of the DPWM common-mode voltage, and the sum of the first modulation coefficient and the second modulation coefficient is constantly 1; determining values of a first modulation coefficient and a second modulation coefficient based on the current modulation mode in response to a switching instruction of switching from the current modulation mode to a target modulation mode; and combining the three-phase SPWM modulation wave, the first modulation coefficient, the SVPWM common-mode voltage, the second modulation coefficient and the DPWM common-mode voltage to generate a total modulation wave. According to the invention, non-stop switching of SVPWM and DPWM is realized, fast and stable neutral-point voltage and smooth transition of neutral-line current and three-phase current are ensured when two modulation modes are switched, and the smooth transition requirement of mode switching is met.
Owner:大秦新能源科技(泰州)有限公司

Control method of three-level inverter, motor driver and vehicle

The invention relates to a control method of a three-level inverter, a motor driver and a vehicle. The control method comprises the following steps: acquiring a first voltage at two ends of a first bus capacitor, a second voltage at two ends of a second bus capacitor, a reference current of the three-level inverter and a modulation voltage corresponding to each phase line on the alternating current side of the three-level inverter; determining an initial accumulated charge based on the first voltage and the second voltage; determining a zero-sequence injection voltage based on the reference current, the modulation voltage corresponding to each phase line and the initial accumulated charge; determining a target modulation voltage corresponding to each phase line according to the modulation voltage corresponding to each phase line and the zero-sequence injection voltage; and outputting a target modulation signal to the three-level inverter according to the target modulation voltage. Obviously, the probability of midpoint voltage deviation can be effectively reduced through the zero-sequence injection voltage, interference in the control process of the three-level inverter is reduced, the output quality of the target modulation signal is improved, and the control efficiency of the three-level inverter is improved.
Owner:ZHEJIANG GEELY HLDG GRP CO LTD +1

Inverter IGBT intelligent fault diagnosis method based on multi-scale attention network

The invention discloses an inverter IGBT intelligent fault diagnosis method based on a multi-scale attention network, and relates to the technical field of power electronic equipment fault diagnosis. A three-phase current signal of a three-level NPC inverter is collected and preprocessed; multi-dimension fault features of the current signals are extracted in parallel through multi-scale depth separable convolution; a scale-aware efficient attention mechanism is introduced to carry out weighted optimization on each scale feature, and key fault information is strengthened; and outputting a fault diagnosis result through a feature fusion and classification network, and performing INT8 quantization processing on the model to adapt to an embedded deployment scene. The method has the advantages of being high in multi-scale feature capturing capacity, high in diagnosis precision and light in model weight, and can meet the dual requirements of industrial application for real-time performance and accuracy.
Owner:HEFEI UNIV OF TECH

Improved deadbeat current predictive control method based on jury criterion

The application discloses an improved zero-error current predictive control method based on a Jury criterion, and specifically comprises the following steps: step 1, collecting the grid-side inductance current of a T-type three-level inverter and the voltage at a grid connection point, and constructing a mathematical model in an alpha-beta coordinate system; step 2, performing forward Euler discretization on the model constructed in step 1 to obtain a reduced zero-error current predictive control model; step 3, performing prediction on the control model obtained in step 2 by using Newton interpolation to obtain predicted current and voltage; step 4, converting the predicted results obtained in step 3 to obtain the output voltage of the inverter; step 5, solving the value range of lambda by using the Jury criterion; and step 6, according to the solving result of step 5, using a pulse signal to drive the on-off of the switching tube in the inverter. The application solves the problem that the existing zero-error current predictive control has low precision and dynamic performance.
Owner:XIAN UNIV OF TECH +1

Fault feature vector prediction-based open-circuit fault diagnosis method for three-level inverter

The invention discloses a three-level inverter open-circuit fault diagnosis method based on fault feature vector prediction, and the method comprises the steps: reconstructing a theoretical stator current through reference current based on a motor steady-state model, and introducing an amplitude per-unit algorithm to calculate a current residual error, thereby recognizing the fault, and locking a fault phase; collecting a system state at the moment of fault triggering, deducing a modulation switch sequence in a future detection period on line by using a reference voltage vector time sequence prediction model, and generating a dynamic reference value of theoretical action times of each switch state; performing real-time statistics on the actually-measured cutoff times of the fault phase in different switch states by using an edge triggering mechanism, and constructing an actually-measured feature vector; and determining a fault device by calculating the minimum distance between the actual measurement vector and each fault modal theoretical feature. The method can effectively eliminate the influence of the rotating speed and load change of the motor on the diagnosis threshold, solves the problem that the fault features of the inner tube and the clamping diode are overlapped and are difficult to distinguish, and improves the robustness and accuracy of fault diagnosis.
Owner:ZHEJIANG UNIV ADVANCED ELECTRICAL EQUIP INNOVATION CENT

A full-digital hysteresis control method for sampling time online prediction of a three-level inductance-free inverter

The present application relates to a kind of full digital hysteresis control method of inductance-free three-level inverter sampling time online prediction, belong to power electronic converter technical field, solve the dependence of full digital hysteresis control algorithm of three-level converter on high sampling rate, and the problem of being greatly influenced by main circuit filter parameter, it includes determining the mathematical model and modulation method of three-level converter, determining the full digital three-level hysteresis control algorithm of inductance-free sampling time online prediction, correction prediction sampling time interval.The full digital hysteresis control method is used for inductance-free three-level inverter hysteresis control simulation.
Owner:AIR FORCE UNIV PLA

A three-level inverter fault diagnosis method based on output voltage vector image

The application provides a three-level inverter fault diagnosis method based on an output voltage vector image, and relates to the technical field of power electronic equipment state monitoring and fault diagnosis, and the method comprises the following steps: collecting three-phase output voltage signals in real time by an inverter master control microcontroller, obtaining voltage vector sequences in a two-phase stationary coordinate system after filtering, normalization and Clarke transformation; setting a short-time analysis window, generating a two-dimensional gray image representing the instantaneous motion trajectory form of the voltage vector by coordinate mapping, bilinear interpolation and gray processing on the continuous vector sequences in the window; loading and executing a pre-quantized lightweight convolutional neural network model by using a special lightweight convolutional neural network model integrated in the microcontroller, performing real-time inference and fault mode matching on the trajectory image; and feeding back the microsecond-level diagnosis result to the main processor core by the model through a hardware interrupt, so as to trigger immediate protection or fault-tolerant control.
Owner:HUAQIAO UNIVERSITY

POWER CONVERSION DEVICE

An inverter circuit is a three-level inverter circuit. The inverter circuit comprises: a P busbar (71) connected to a high-potential terminal of a battery, an N busbar (72) connected to a low-potential terminal of the battery, and an M busbar (73) with a potential between the P busbar (71) and the N busbar (72). The inverter circuit also includes: a PM capacitor (30) connected to the P busbar and the N busbar, an MN capacitor (40) connected to the N busbar and the M busbar, and a semiconductor device (20) connected to the M busbar.The M busbar is a part between (i) the second power module (20) and (ii) the PM capacitor and the MN capacitor, is arranged between the P busbar and the N busbar and has a base section (73a) opposite the P busbar and the N busbar.
Owner:DENSO CORP

Photovoltaic inverter imbalance fault diagnosis method based on improved data enhancement method

The invention discloses a photovoltaic inverter unbalance fault diagnosis method based on an improved data enhancement method, and belongs to the technical field of inverter fault diagnosis. The method comprises the following steps: acquiring an output three-phase current signal of an inverter to obtain a real sample set; determining normal samples and fault samples according to a given proportion to form an unbalanced training set; an improved generative adversarial network is adopted to generate a fault sample, and a new balanced data set is obtained; and building a fault diagnosis model based on the convolutional neural network, training the fault diagnosis model by using the training sample, and realizing a fault diagnosis task of the NPC three-level inverter by using the trained diagnosis model. According to the fault sample generated by the method, fault feature information can be more completely reserved, the generation quality of the fault sample is improved, and higher diagnosis accuracy under an unbalanced fault diagnosis task is realized.
Owner:HEFEI UNIV OF TECH

Method for heating a high-voltage battery, high-voltage system and vehicle

The invention relates to a method for heating a high-voltage battery (2) of a high-voltage system (1) of an electrically powered vehicle, wherein the high-voltage system (1) comprises an inverter (4) and at least one capacitor (C_X1, C_X2) in an intermediate circuit, wherein the inverter (4) has two high-voltage potentials (P+, P-) as DC voltage terminals and three phase terminals to which an electric machine (3) is connected, wherein the inverter (4) has a plurality of semiconductor switches (S1 to S12), wherein energy is transferred between the high-voltage battery (2) and the at least one capacitor (C_X1, C_X2) using the semiconductor switches (S1 to S12), the at least one capacitor (C_X1, C_X2) and the motor inductances (L1, L2, L3) of the electric machine (3), wherein the inverter (4) is designed as a 3-level inverter, and wherein the intermediate circuit is a series connection of two Capacitors (C_X1,C_X2) with a center tap (M) connected to the inverter (4), wherein energy is alternately transferred between the two capacitors (C_X1, C_X2) using the semiconductor switches (S1 to S12) of the inverter (4) in order to cause a correspondingly reversing current flow between the high-voltage battery (2) and the capacitors (C_X1, C_X2) and thus to heat the high-voltage battery (2).
Owner:MERCEDES BENZ GROUP AG

Three-level inverter phase module and frequency converter

The invention discloses a three-level inverter phase module and a frequency converter, the three-level inverter phase module comprises a three-level circuit, the three-level circuit comprises a first branch, a second branch, a first clamping diode and a second clamping diode, the first branch comprises a first IGBT, a second IGBT, a third IGBT and a fourth IGBT, and the second branch comprises a fifth IGBT, a sixth IGBT, a seventh IGBT and an eighth IGBT; the driving mainboard is used for driving the IGBT in the first branch; the driving slave board is connected with the driving main board and is used for driving the IGBT in the second branch; the connecting seat receives electric energy provided by a power supply end of an external control loop; and the power supply conversion module is used for converting electric energy and supplying power to the driving main board and the driving slave board. The single phase of the three-level inverter is modularly designed, independent use is facilitated, and the effective output current of the phase module is improved through the parallel connection mode of the two IGBTs and the master-slave driving mode.
Owner:QINGDAO CCS ELECTRIC CORP

Method, device and equipment for detecting dc capacitor aging of three-level inverter and storage medium

This application relates to the field of power electronics technology and discloses a method, device, equipment, and storage medium for detecting the aging of DC capacitors in a three-level inverter. The method includes: obtaining a simplified topology model of the three-level inverter; based on the working principle of the three-level inverter, controlling the midpoint current to zero by injecting a zero-sequence voltage into the three-phase reference voltage; under the state of midpoint potential balance, monitoring a first current and a second current using the correlation between capacitor current and capacitance value, calculating the current ratio of the first current and the second current, and deriving the capacitance ratio of the first capacitor and the second capacitor based on the current ratio; and identifying the aging state of the capacitor online based on the capacitance ratio. The device, equipment, and storage medium all correspond to this method. This application achieves online aging identification of capacitors by monitoring the current changes of the upper and lower DC capacitors of a three-level inverter, under the premise that the midpoint potential balance of the three-level inverter is controlled.
Owner:HUNAN UNIV

A three-level inverter harmonic suppression method based on zero vector symmetrical reconstruction and spread spectrum composite modulation

The application discloses a three-level inverter harmonic suppression method based on zero vector symmetrical reconstruction and spread spectrum composite modulation, and the method comprises the following steps: step 1, signal acquisition and voltage instruction acquisition; step 2, spread spectrum modulation parameter setting; step 3, basic vector action time calculation; step 4, zero vector symmetrical reconstruction of vector sequence; step 5, switch time calculation and register updating; and step 6, PWM signal generation and system closed loop operation. The application realizes full-band suppression of inverter output PWM harmonics by deeply fusing the zero vector symmetrical reconstruction technology and the spread spectrum modulation technology. The application can be applied to a permanent magnet synchronous motor driving system powered by a three-level voltage source inverter, can simultaneously suppress the PWM harmonic amplitude near the odd carrier frequency and the even carrier frequency, effectively reduces electromagnetic vibration and noise, and has extremely high application value in the field of high-power inverters and motor drives.
Owner:HARBIN INST OF TECH

A transient compensation method for output voltage of T-type three-level inverter

The application provides a T-type three-level inverter output voltage transient fast compensation method, and relates to the field of power electronic control, which collects three-phase output voltage and current in real time, and obtains voltage vector sequence in two-phase static coordinate system through Clarke transformation. The real-time average radius and offset vector of voltage vector trajectory are calculated through sliding window, the radius deviation rate and offset rate are calculated, and compensation is triggered when any index exceeds the preset threshold. According to the distortion type, the required compensation deviation of each phase is calculated, the compensation priority is determined according to the compensation deviation absolute value, and the single tube compensation is preferentially selected based on the compensation deviation polarity and the phase current direction. When the amplitude is insufficient or the current direction is not matched, the double tube combination is started. The selected switch tube drive pulse is shielded, the switch function is reconstructed to execute compensation, and iteration verification is carried out until the voltage trajectory is restored to be circular. The application is realized by pure software, does not change the original control architecture and topology mode, guarantees the dynamic voltage transient to meet the standard, and does not deteriorate the harmonic quality.
Owner:HUAQIAO UNIVERSITY

Bus support capacitance calculation method, equipment, medium and product

The invention discloses a bus support capacitance calculation method and device, a medium and a product, and relates to the field of power electronics, and the method comprises the steps: firstly, calculating a neutral-point potential fluctuation allowable value according to a three-phase output voltage peak value and a load power factor angle of a three-level inverter; calculating the three-phase output current of the three-level inverter according to the three-phase output current peak value of the three-level inverter; capacitance current flowing through the subintervals is calculated; then calculating the charge cumulant of the bus capacitor in a charging period; and finally, calculating the minimum capacity of the bus capacitor according to the neutral-point potential fluctuation allowable value and the charge cumulant. The technical problem that the capacitance cost and the capacitance volume cannot be effectively reduced due to the fact that the existing method is low in calculation efficiency and difficult to accurately calculate the minimum capacitance capacity on the premise that the output waveform is not distorted is solved.
Owner:SICHUAN HANGDIAN MICRO ENERGY CO LTD

A three-level inverter permanent magnet synchronous motor SVPWM control method for electric vehicles

The application discloses a kind of SVPWM control methods of three-level inverter permanent magnet synchronous motor for electric vehicle, it is related to motor drive and control technical field in electric vehicle high-voltage main drive system, method is: the basic voltage vector of the larger common-mode voltage is discarded to obtain new basic voltage vector diagram;The difference between reference speed and current speed is obtained by outer ring speed PI controller, and q-axis reference current is given d-axis reference current;Three-phase stator current is obtained by Clark and Park conversion d, q-axis component;The α, β-axis component of reference voltage vector is obtained by using deadbeat current prediction control method and through anti-park conversion;The sector where reference voltage vector is located is judged, and the appropriate basic voltage vector is selected based on the new basic voltage vector diagram, the optimal vector combination is selected by value function, and the switching sequence is output in the principle of minimum total switching times, and the inverter is acted on, to drive permanent magnet synchronous motor, improve the energy utilization efficiency of electric vehicle.
Owner:HEFEI UNIV OF TECH

Optimized pulse timing correction method and application based on flux deviation and potential offset

The present invention discloses a method for optimizing pulse timing correction based on stator flux deviation and midpoint potential offset. Utilizing the concept of model predictive control, the stator flux deviation and midpoint offset problem in a midpoint-clamped inverter based on optimized pulse width modulation is transformed into a quadratic function optimization problem with inequality constraints, which is numerically solved using the active set method. The method is also disclosed for use in a permanent magnet synchronous motor driven by a three-level inverter. This patented method combines optimized pulse width modulation of a midpoint-clamped inverter with a model predictive algorithm, enabling the inverter output to have both good low-order harmonic suppression characteristics and fast dynamic response and midpoint balancing capabilities without increasing the number of optimized pulses.
Owner:WUHAN INSTITUTE OF MARINE ELECTRIC PROPULSION (THE 712TH RESEARCH INSTITUTE OF CHINA STATE SHIPBUILDING CORP LTD)

Systems for power conversion and multi-level inverter for electric vehicle

A power conversion system includes a power converter including a plurality of switches, one or more capacitors, and a charging connector, wherein the power converter is configured to operate in each of a two-level inverter mode, a three-level inverter mode, a two-level converter mode, a three-level converter mode, an AC-DC onboard charger (OBC) mode, and a DC-DC boost converter mode.
Owner:BORGWARNER INC

Three-level inverter neutral-point voltage balance control method and system and vehicle

The invention discloses a three-level inverter neutral-point voltage balance control method and system and a vehicle, and the method comprises the steps: determining a target d-axis current based on a requested d-axis current and a neutral-point voltage deviation, and then determining a target q-axis current; carrying out current closed-loop control, carrying out SVPWM (Space Vector Pulse Width Modulation), and outputting positive and negative small vector action time and a sector where a voltage vector is located; pI adjustment is carried out on the neutral-point voltage deviation to obtain a neutral-point voltage compensation value; based on the sector where the voltage vector is located, the capacitance value of the three-level inverter thin-film capacitor and the three-phase current, the neutral-point voltage compensation value is subjected to linearization processing, and a positive and negative small vector action time compensation value is obtained; compensating the positive and negative small vector action time by using the positive and negative small vector action time compensation values; and controlling the operation of the three-level inverter based on the action time of the compensated positive and negative small vectors. According to the invention, the calibration difficulty of the neutral-point voltage PI adjustment parameter can be reduced, and the neutral-point voltage balance controllability can be improved.
Owner:CHENZHI AUTOMOBILE TECHNOLOGY GROUP CO LTD CHONGQING INNOVATION RESEARCH BRANCH +1