A Stability Test Method for Server High-frequency Data Transmission
A technology of stability testing and high-frequency data, applied in digital transmission systems, transmission systems, data exchange networks, etc., can solve problems such as low transmission rates and achieve the effect of improving product design quality
Active Publication Date: 2016-06-29
LANGCHAO ELECTRONIC INFORMATION IND CO LTD
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[0005] 3. Low-speed long-term data storage devices (such as hard disks) are connected to the processor through a high-speed PCIE device integrated with RAID functions. The data between the high-speed PCIE expansion device and the processor needs to be accessed each other, and the transmission rate is low
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[0017] The method of the present invention is described in detail below with reference to the accompanying drawings.
[0018] The current server system and its internal data logic transmission path are connected through the above three data interaction paths to form a high-speed internal data transmission network within the server. In view of the above transmission characteristics, the inter-processor communication link, the memory communication link, and the PCIE high-speed expansion device communication link are used as test objects to conduct serial test verification respectively. If the communication of each link meets the design indicators, the service system can be guaranteed Meet the stability under high-speed operation.
[0019] A method for testing the stability of high-frequency data transmission of a server according to the present invention, the following respectively introduces the relevant testing means for each communication link as an example:
[0020] 1. Test...
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The invention provides a method for testing the stability of high-frequency data transmission for a server. The communication bit error rate of key nodes through which high-frequency data passes when being transmitted in a server system is tested to detect whether the server system is designed reasonably or not and the running stability meets market requirements or not. The key testing node comprises a communication link between processors, a memory communication link and a PCIE (Peripheral Component Interconnect Express) high-speed expansion equipment communication link, wherein a data transmission node between the processors is responsible for data transmission between the processors, and a memory communication link node is responsible for data transmission between the processors and a memory; and a PCIE high-speed expansion equipment communication link node is responsible for data transmission between the processors / memory and PCIE high-speed expansion equipment. According to the method, the data transmission bit error rate of the communication link between processors, the memory communication link and the PCIE high-speed expansion equipment communication link is tested to validate whether the server runs stably or not under the condition of high-frequency data transmission.
Description
technical field [0001] The current server system is developing rapidly, and the data transmission rate in the server system is gradually increasing, which brings more and more challenges to the stability design of the server. In order to meet the requirements of effectively verifying the server system under high-frequency data transmission In terms of stability, this paper designs a method to effectively verify whether the server system is running stably by separately testing the bit error rate of the key nodes through which high-speed data transmission passes. Background technique [0002] Nowadays, high-speed data transmission inside the server has the following characteristics: [0003] 1. The data between the processors need to access each other, and the transmission rate is the highest; [0004] 2. The data between the processor and the memory device needs to access each other, and the transmission rate is high; [0005] 3. Low-speed long-term data storage devices (su...
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IPC IPC(8): H04L12/26
Inventor 平原
Owner LANGCHAO ELECTRONIC INFORMATION IND CO LTD