Digitally controlled analog modulation circuit
An analog modulation and digital control technology, applied in circuits, electrical components, laser parts, etc., can solve the problems of inability to obtain analog modulation signal output, common terminal glitch interference, etc., to achieve the effect of eliminating glitch interference and reasonable design
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Embodiment 1
[0021] A digitally controlled analog modulation circuit (see attached figure 1 ), including working power supply 1, bias power supply 2, modulation signal source 3, SPDT analog switch ASW1, SPDT analog switch ASW2 and laser constant current drive circuit 5, normally closed contacts of SPDT analog switch ASW1 and The normally open contacts of the SPDT analog switch ASW2 are electrically connected to the output end of the working power supply, the normally closed contacts of the SPDT analog switch ASW2 and the normally open contacts of the SPDT analog switch ASW1 are connected to the bias power supply The output ends are electrically connected, the common end of the single-pole double-throw analog switch ASW1 and the common end of the single-pole double-throw analog switch ASW2 are electrically connected to the input end of the laser constant current drive circuit 5, and the input end of the delay dual output circuit 4 is connected to the modulation signal The output end of the ...
Embodiment 2
[0024] This embodiment is basically the same as Embodiment 1, and the difference is that the delay double output circuit 4 in this embodiment is made up of an inverter, two AND gates and a NAND gate (see the appended figure 2 ), the input terminals of the AND gate and the NAND gate in this embodiment are all short-circuited and connected in series to form an inverting logic circuit, the input end of the inverting logic circuit is electrically connected with the output end of the inverter, and the output of the inverting logic circuit terminal is electrically connected to the control terminal of the SPDT analog switch ASW2, the input terminal of the inverter is electrically connected to the output terminal of the modulation signal source 3, and the output terminal of the inverter is also electrically connected to the control terminal of the SPDT analog switch ASW1 .
Embodiment 3
[0026] This embodiment is basically the same as Embodiment 1, and the difference is that the delay double output circuit 4 in this embodiment is composed of three NAND gates and an inverter (see the attached image 3 ), the input ends of the NAND gates in this embodiment are all short-circuited and connected in series to form an inverting logic circuit, the input end of the inverting logic circuit is electrically connected to the output end of the inverter, and the output end of the inverting logic circuit is connected to the The control end of the double-throw analog switch ASW2 is electrically connected, the input end of the inverter is electrically connected to the output end of the modulation signal source 3 , and the output end of the inverter is also electrically connected to the control end of the SPDT analog switch ASW1.
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