Wireless low-jitter transmission method for digital asynchronous pulse

A low-jitter, pulse technology, applied in pulse processing, pulse technology, automatic power control, etc., to achieve good consistency, reduce design difficulty, and low debugging difficulty

Inactive Publication Date: 2012-12-12
NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Under the current technical conditions, this is difficult to achieve

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  • Wireless low-jitter transmission method for digital asynchronous pulse
  • Wireless low-jitter transmission method for digital asynchronous pulse

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Embodiment Construction

[0026] refer to Figure 1 to Figure 2 . figure 1 It is a block diagram of the electrical principle of an embodiment of the internal processing from the wired side signal to the wireless side of the present invention, which includes a pulse shaping module 1, a rough sampling module 2, a fine sampling module 3, an encoding and modulation module 4, a digital / analog conversion module 5, and a radio frequency unit Module 6; wherein the pulse shaping module 1, the rough sampling module 2, the fine sampling module 3, the encoding and modulation module 4, and the digital / analog conversion module 5 form a modulation unit. The pulse shaping module 1 shapes the input pulse and corrects the pulse deformation on the line transmission; the rough sampling module 2 performs rough sampling on the shaped input pulse to obtain the corresponding clock period when the rising edge of the pulse occurs; the fine sampling module 3 pairs The time difference between the rising edge of the pulse and the...

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Abstract

The invention discloses a wireless low-jitter transmission method for a digital asynchronous pulse, which belongs to the wireless pulse transmission and communication field. The wireless low-jitter transmission method for the digital asynchronous pulse is especially suitable for the wireless low-jitter transmission of radar pulse. Pulse shaping is carried out on a transmitting end; the pulse is subjected to rough sampling and fine sampling by utilizing a reference clock and a time-to-digital conversion circuit; the digitalized time information obtained by sampling is coded and modulated; on a receiving end, the steps of demodulating and decoding are finished by utilizing a synchronized reference clock; rough sampling information and fine sampling information are recovered; according to the rough sampling information and the fine sampling information, a clock period corresponding to a pulse signal to be recovered is determined; the rising edge of the corresponding clock period is delayed for a certain period of time by utilizing a programmable delay circuit to obtain a pulse rising edge to be recovered; the pulse rising edge is widened and judged; and finally, a low-jitter pulse signal is output. According to the wireless low-jitter transmission method for the digital asynchronous pulse, the transmitting end pulse can be favorable recovered, the wireless low-jitter transmission method has a low requirement on a clock in a system, and the main circuit component is realized by adopting an FPGA (field programmable gate array) or ASIC (application specific integrated circuit), thereby being low in designing and debugging difficulty.

Description

technical field [0001] The invention relates to a digital asynchronous pulse wireless low-jitter transmission method in the pulse wireless transmission communication field, and is particularly suitable for wireless low-jitter transmission of radar pulses. Background technique [0002] The commonly used pulse digital sampling wireless transmission method can accurately determine the presence or absence of a pulse signal at the receiving end, but the rising edge and falling edge jitter of the received pulse signal is relatively large. To reduce edge jitter, it is necessary to increase the sampling clock frequency, thereby increasing the sampling rate of the pulse. If the requirement for edge jitter is as low as nanoseconds, the required clock frequency is as high as 1GHz or even higher. Under current technical conditions, this is difficult to achieve. Contents of the invention [0003] The technical problem to be solved by the present invention is to provide a pulse digiti...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K5/135H03L7/087
Inventor 李建强吴俊晨王伟王洪磊
Owner NO 54 INST OF CHINA ELECTRONICS SCI & TECH GRP
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