Method for reducing data read-write errors of EEPROM (electrically erasable programmable read-only memory)

Abstract

The invention provides a method for reducing data read-write errors of an EEPROM. The method comprises the following steps: an array defining step for defining a buffer array in an SRAM (static random access memory) and defining a data area array and a backup area array in the EEPROM, wherein both the data area array and the backup area array include CRC (cyclic redundancy check) data; a data writing step for writing data in the EEPROM; a check data computation step for writing the computed CRC data in check data areas of the data area array and the backup area array; a data checking step for checking validity of the data area array and the backup area array by the CRC data; a data restoring step; and a default overriding step. The method for reducing data read-write errors of the EEPROM can effectively reduce the data read-write error probability of the EEPROM under abnormal conditions including read-write power-down, strong interference, strong electrostatic and the like, can not occupy more space of the EEPROM, is less in software overhead, and is stable and reliable in program.

Description

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AI Technical Summary

Benefits of technology

This patented technology describes an improved method for storing data in memory devices called RAM (Random Access Memory). By combining two different types of storage areas: one uses CRC checking data from both the data region array and spare area array, another includes CRC checks against these stored values during programming or testing operations. These techniques help prevent erroneously accessing certain parts of this memory device when performing various functions like transferring data between them. Overall, this new design improves efficiency and reliability by reducing potential issues related to incorrect accesses caused by unexpected voltage fluctuations or other factors affecting the circuitry within the chip itself.

Problems solved by technology

This patented describes various technical features related with improving non volatile memories like flash cards. These include improvements made over previous designs where programming was done once per second, including improved reliability and longer lifetimes compared to older ones. Additionally, certain techniques have shown promise through preventing incorrect data writes caused by environmental conditions or operating systems issues. Overall, this technology helps improve performance and efficiency while reducing costs associated with storing and managing data stored within them.

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