Manufacturing method for super junction metal oxide semiconductor field effect transistor (MOSFET)

Abstract

The invention relates to a manufacturing method for a super junction metal oxide semiconductor field effect transistor (MOSFET). The manufacturing method is implemented by the following steps of: providing an n-type heavily-doped n+ substrate, forming an n-type epitaxial layer on the n+ substrate, and forming a p well region and a composite buffer layer; growing a field oxide layer on a silicon chip; defining a device cell region by photoetching the field oxide layer, and reserving a part of the field oxide layer as a barrier layer for the injection of a source region n+; growing a gate oxide layer, depositing polycrystalline silicon, and defining a region of a polycrystalline silicon gate in a photoetching way; using a polycrystalline silicon layer and the field oxide layer as a barrier layer for the n-type impurity ion injection of source region, and performing well driving to form the source region n+; depositing a dielectric layer on the surface of the whole semiconductor silicon chip; defining a contact hole region in a photoetching way, and etching the dielectric layer to form a contact hole; and depositing a metal layer on the dielectric layer, and performing etching. The manufacturing method can be implemented by the conventional semiconductor manufacturing process, and the increase of difficulty in the process is avoided, so that production cost is lowered.

Description

technical field [0001] The invention relates to a manufacturing method of a super junction MOSFET. Background of the invention [0002] The existing super-junction MOSFET manufacturing method one is: first form a composite buffer layer, and then the same as the ordinary MOSFET manufacturing process: grow field oxygen, field oxygen etching, form gate oxide, gate electrode (poly) , forming the device feature layer (p well region), source region n+, metal electrodes, etc. The disadvantage of this method is that there will be a high temperature annealing process when forming the device feature layer (well region), which will affect the composite buffer layer (CB layer ) shape has an impact. [0003] The second existing super junction MOSFET manufacturing method is: first form the device feature layer (p well region) on the wafer, then form the composite buffer layer (CB layer), then grow field oxygen, field oxygen etching, and form gate oxide layer (gate oxide), gate electrod...

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Problems solved by technology

[0002]The existing super-junction MOSFET manufacturing method one is: first form a composite buffer layer, and then the same as the ordinary MOSFET manufacturing process: growth field oxygen, field oxygen etching , form the gate oxide layer (gate oxide), gate electrode (poly), form the device characteristic layer (p well region), source region n+, metal electrode, etc. The disadvantage of this method is that when forming the device characteristic layer (well region), it will There is a high-temperature annealing process, which will affect the morphology of the composite buffer layer (CB layer)

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