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A realization method of variable storage based on cpu power-off interrupt

An implementation method and a power-off interrupt technology, applied in the direction of protecting storage content from loss, can solve problems such as increasing system program burden, increasing product cost, limiting product service life and post-maintenance costs, and saving power-off storage devices. , Reducing hardware costs and achieving significant economic benefits

Active Publication Date: 2015-12-02
福州昌晖自动化系统有限公司
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Problems solved by technology

This method not only requires an external memory chip, which increases the cost of the product, but the increase in parts also limits the service life of the product and the cost of later maintenance
In addition, due to real-time storage, it also increases the burden of system program execution

Method used

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  • A realization method of variable storage based on cpu power-off interrupt

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Embodiment Construction

[0013] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.

[0014] This embodiment provides a method for realizing variable storage based on CPU power-off interrupt, characterized in that: a space is divided in the FLASH program space of the CPU, and an interrupt is triggered after detecting power-off by using the CPU power-off detection , and store the parameters to be saved into the space.

[0015] The above space is divided at the end of the FLASH program space.

[0016] The above-mentioned interrupt is set as the highest priority in the program.

[0017] In addition, the method of the present invention also includes increasing the capacity of the energy storage capacitor at the power supply end of the CPU. The capacity of the capacitor is 1000uf.

[0018] In an embodiment of the present invention, it further includes erasing the parameters in the space by running a program before the interruption. The po...

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Abstract

The invention relates to an achieving method for variable storage based on central processing unit (CPU) power failure interruption. The method is characterized in that a space is divided from a FLASH program space of a CPU which is utilized to conduct power failure detection, the interruption is triggered after power failure is detected, and parameter to be stored is stored in the space. The achieving method can achieve power failure storage of parameter of an industrial control instrument without an external storage chip, saves equipment cost and improves market competitiveness.

Description

technical field [0001] The invention relates to the technical field of variable storage of industrial control instruments, in particular to a method for realizing variable storage based on CPU power-off interruption. Background technique [0002] In the design of industrial control instruments, some variables (such as cumulative flow, working status, etc.) need to be updated in real time, and have a power-off save function. The design generally uses a special RAM chip with power-off save, such as FRAM, NVRAM, etc. , or use the RAM external battery to realize power-down saving. This method not only requires an external memory chip, which increases the cost of the product, but also limits the service life of the product and the cost of later maintenance due to the increase in parts. In addition, due to real-time storage, it also increases the burden of system program execution. Contents of the invention [0003] The purpose of the present invention is to provide a method f...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/16
Inventor 林瑞忠张善明
Owner 福州昌晖自动化系统有限公司
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