Method for solving fault-tolerant upper bound of reconfigurable multiprocessor array

A processor array and multi-processor technology, applied to the generation of response errors, combination of various digital computers, etc., can solve the problem of high fault-tolerant upper bound, and achieve the effect of accurate fault-tolerant upper bound

Inactive Publication Date: 2013-06-19
TIANJIN POLYTECHNIC UNIV
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Problems solved by technology

[0011] In this method, there is an error in calculating the value of N by using the minimum number of undamaged processor units in each row as the maximum number of available logical columns, so the upper bound of the fault tolerance is higher.
In addition, because the replacement rule does not make a necessary limit on the range of damaged processors that can be replaced by the damaged processor, the upper bound of the fault tolerance obtained is too high

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  • Method for solving fault-tolerant upper bound of reconfigurable multiprocessor array
  • Method for solving fault-tolerant upper bound of reconfigurable multiprocessor array
  • Method for solving fault-tolerant upper bound of reconfigurable multiprocessor array

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Embodiment Construction

[0057] Below in conjunction with accompanying drawing, the present invention is described in further detail:

[0058] In order to improve the existing methods, the present invention introduces the following concepts:

[0059] 1. The unavailable processor unit refers to such a processor: the processor unit is not physically damaged, but due to the presence of damaged processor units nearby, the processor unit no matter which routing method is used cannot be included in the refactored postprocessor array;

[0060] The method for marking all unusable processors evolved from damaged processor units in the array is as follows:

[0061] (1) If an undamaged processor unit is in row r, column c (denoted as P r，c ), then when P r+1，c-1 , P r+1，c , P r+1，c+1 When the processor unit is damaged or unusable, P r，c is an unavailable processor unit; when P r-1，c-1 , P r-1，c , P r-1，c+1 When the processor unit is damaged or unusable, P r，c is an unavailable processor unit;

[0062]...

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Abstract

The invention provides a method for solving a fault-tolerant upper bound of a reconfigurable multiprocessor array and belongs to the field of reconfiguration of the multiprocessor array. According to the method, processor units which are not usable logically are labeled in the processor array, local area reversal is carried out on adjacent rows which can cause misjudgment easily, the maximum usable logic column number is obtained, then the fault-tolerant upper bound is obtained, and then advantages and disadvantages of an existing reconfiguration algorithm are evaluated by using the fault-tolerant upper bound. By means of the method for solving the fault-tolerant upper bound of the reconfigurable multiprocessor array, the more accurate fault-tolerant upper bound is obtained, and therefore the advantages and the disadvantages of the existing reconfiguration algorithm can be evaluated more accurately; and the range of replaceable damaged processors is further limited, and therefore results can better conform to production reality.

Description

technical field [0001] The invention belongs to the field of reconfiguration of multiprocessor arrays, and in particular relates to a method for solving the fault-tolerant upper bound of reconfigurable multiprocessor arrays. Background technique [0002] The current technology enables multi-processor units to be integrated in an array. Due to natural or human reasons, some processor units may fail to work normally during production or use. In order to make a processor array containing a bad processor unit usable, a reconfiguration technique is used to reorganize the error-free processor unit. Correspondingly, a measurement method for judging the pros and cons of the reconfiguration technology has emerged. By comparing the maximum number of available processor units obtained by the measurement method (that is, the upper bound of fault tolerance) with the number of processor units obtained by the existing reconfiguration method The gap between judges the pros and cons of exis...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/07G06F15/16
Inventor 武继刚孙学梅沈宇泽徐雄王琬茹
Owner TIANJIN POLYTECHNIC UNIV
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