7results about How to "Reduce parallelism" patented technology

The embodiment of the invention provides a data processing method and a data processing chip, and the method comprises the steps: determining a first operation object corresponding to a first operation unit under the condition that the state of the first operation unit is an idle state, the first operation unit is any one of at least two operation units, and the first operation object corresponds to the first operation unit; the first operation object comprises one of a first node in the first Merkel tree and a target sequence chain of a second node in the first Merkel tree; and operating the first operation object by using the first operation unit to obtain an operation result. Thus, when any operation unit is in the idle state, the nodes or the sequence chains in the Merkle tree serve as the operation objects of the operation unit, the storage space can be reduced, high-parallel operation under the small storage space is achieved, all the operation units are fully utilized, and the operation efficiency is improved. And the parallel effect is improved while the utilization rate of the operation unit is improved, so that the operation efficiency is improved.

The utility model discloses a fisheye flat gasket stamping die which is characterized in that a fisheye extruding station, a punching station, a blanking station and a guide pin mounting station are correspondingly arranged on a concave die plate, a lower base plate and a lower die plate at the lower end part of the die; the female die plate is further provided with a conical rod mounting station and a guide punching rod avoiding station. And a fisheye extruding mounting station, a punching mounting station and a blanking mounting station which are respectively arranged corresponding to the fisheye extruding station, the punching station and the blanking station are arranged on a stripping template and an upper fixing plate at the lower end part of the die. The stripping template is further provided with a conical rod avoiding station, a guide pin avoiding station and a guide punching rod installing station which correspond to the conical rod installing station, the guide pin installing station and the guide punching rod avoiding station respectively. The punching die is high in punching efficiency, the material utilization rate can be remarkably increased, the high precision of the surface parallelism and planeness of the fisheye flat gasket can be guaranteed, and the punching die can be produced in a large scale.

This application provides a directed acyclic graph (DAG) scheduling method and system for multiple toolchains in intelligent agents, solving the technical problems of existing scheduling methods that rely on manual orchestration, have high topological redundancy, and low execution efficiency. First, it receives multi-tool collaboration task instructions and parses them to obtain a set of tool identifiers to be orchestrated and corresponding tool capability declaration texts. Then, it extracts historical call topology patterns with time-stamped edges; next, it retrieves candidate directed edges that meet capability connection conditions and combines them to generate an initial DAG skeleton; then, it eliminates redundant edges to obtain a simplified DAG structure; finally, it generates a tool call execution sequence containing time-series tool identifiers and a predecessor dependency list. This invention can achieve automated and efficient scheduling of multiple toolchains, adapt to dynamic task requirements, and reduce the overall task execution time.

The utility model provides a kind of tensioning device of belt conveyor, including belt seat, driving pulley rotationally arranged in one end of belt seat, driven pulley rotationally arranged in other end of belt seat, fixed push-up piece and movable push-up piece;Belt seat includes first split body and second split body, and the end of first split body and second split body is movably spliced together;Fixed push-up piece is located in the inside of first split body and is located in the end close to second split body, and the side wall of second split body is formed with insertion hole in the end close to first split body, and movable push-up piece is inserted into insertion hole;First inclined plane is formed in the side of fixed push-up piece facing movable push-up piece, and second inclined plane is formed in the side of movable push-up piece facing fixed push-up piece, and it is contacted with first inclined plane.The utility model has the advantages that: the distance between driving pulley and driven pulley can be adjusted by the way of pushing and pulling movable push-up piece, and the tensioning adjustment of conveying belt sleeved between driving pulley and driven pulley can be well realized.

The invention provides a prefix parallel adder based on a reconfigurable transistor with a double-gate structure and a construction method of the prefix parallel adder, and three 8-bit prefix parallel adders suitable for different application scenes are constructed based on the prefix parallel adder. Through cooperative regulation and control of the top gate and the back gate of the reconfigurable transistor with the double-gate structure, the reconfigurable logic operation function of'and 'and'or' of a single transistor is realized. Under the condition that the number of devices is reduced, the integrated circuit which is universal, low in power consumption, small in size and light in weight is constructed. The prefix parallel adder established by the invention has remarkable data processing parallelism and low delay, reduces the loss of data transmission, and has the advantages of high speed, low power consumption, small size and favorable integration in a digital system. The delay problem in a digital circuit is solved, a complex digital circuit is constructed by adopting fewer elements, the area of an integrated circuit is reduced while the power consumption is reduced, and the circuit has potential application to logical operation and data processing in a microcontroller.

This invention provides a blended yarn production apparatus, blended yarn, and a production method thereof. The blended yarn production apparatus includes a first guide roller, a second guide roller, a first pressure sensor, a second pressure sensor, a front roller, a tension compensation unit, and a control unit. The first and second guide rollers are arranged side by side, and the first and second pressure sensors are respectively disposed in the grooves of the first and second guide rollers. The front roller is located downstream of the first and second guide rollers along the yarn feeding direction. The tension compensation unit is located upstream of the first and / or second guide rollers along the yarn feeding direction. The output terminals of both the first and second pressure sensors are connected to the input terminal of the control unit, and the output terminal of the control unit is connected to the input terminal of the tension compensation unit. This blended yarn production apparatus and method can improve the structural stability of the spinning twisting triangle zone and improve the performance of the blended yarn.

The embodiment of the invention provides a command processing method, a controller and a computer system.The method comprises the steps that an analysis result of a data processing command is obtained, and the analysis result comprises all operations used for completing interaction between the data processing command and a memory; determining the operation type of each operation, and setting a loose sorting value for each operation based on the out-of-order execution definition corresponding to each operation type, so as to realize out-of-order execution of each operation interacting with the memory among different data processing commands according to the loose sorting value set by the out-of-order execution definition; the out-of-order execution definition is used for indicating whether out-of-order execution of the operation is allowed or not according to conditions for correct execution of the data processing command; and performing packing processing on each operation for completing the setting of the loose sorting value to obtain a data packet corresponding to the data processing command. According to the technical scheme provided by the embodiment of the invention, the execution efficiency of the data processing command can be improved while the execution correctness of the data processing command is ensured.