Embedded system power on self test method

An embedded system and integrity detection technology, which is applied in the detection of faulty computer hardware, etc., can solve the problems of not considering the influence of other component systems, not considering the detection coverage, and not fully representing the operating status of the equipment, etc., to achieve applicable Wide range, low cost and high execution efficiency

Inactive Publication Date: 2013-06-26
CASCO SIGNAL
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Problems solved by technology

[0003] In traditional embedded devices, power-on self-test usually only detects memory or specific hardware, and does not consider the impact of other components on the system, especially safety-related electronic devices
Usually the traditional power-on self-test method adopts a simple method and does not consider the detection coverage, that is, it is only effective for a certain type of fault detection, and the detection results cannot fully represent the operating status of the equipment

Method used

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  • Embedded system power on self test method

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Embodiment

[0025] Such as figure 1 As shown, an embedded system power-on self-check method includes the following steps:

[0026] 1) The system is powered on, and the CPU register is checked during the initialization phase to determine whether the CPU register is faulty, if it is, then the fault is handled, if not, then go to step 2);

[0027] 2) The cross-position method is used to detect the memory to determine whether the memory is faulty, if it is, then the fault is handled, if not, the system will initialize other peripherals (initialize the driver, load the driver device program, discover the device, etc. Operation), such as a FLASH controller, and then perform step 3);

[0028] 3) Classify the instructions used by the system, test each type of instruction separately, and compare the test result with the expected test result vector to determine whether all the instructions pass the test, if yes, go to step 4), if not , Then troubleshoot;

[0029] 4) When the file system components are ava...

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Abstract

The invention relates to an embedded system power on self test method. The method comprises the following steps: (1), electrifying a system, and detecting a center processing unit (CPU) register; (2), detecting internal memory by a cross blocking method being used, and judging whether breakdowns exist in the internal memory or not; (3), classifying instructions used by the system, testing the various instructions, comparing test results with an expected test result vector quantity, and judging whether all the instructions pass a test, if yes, executing the step (4), if no, carrying out failure process; (4), carrying out read only memory (ROM) integrity detection on operation system files which are loaded, application programs and data, and judging whether the loaded files are integrated or not, if yes, quitting detection, if no, entering error process. Compared with the prior art, the embedded system power on self test method has the advantages of being reliable, effective, and high in fault detect covering rate.

Description

Technical field [0001] The invention relates to a device power-on self-check and fault isolation method in the field of safety, and in particular to a power-on self-check method of an embedded system. Background technique [0002] With the development of science and technology, people increasingly rely on various intelligent electronic devices, some of which directly involve personal safety, such as rail transit control systems, aircraft flight control systems, automobile electronic control systems and other key electronic systems. How to ensure These electronic systems are safe and reliable and have become a problem that must be solved. [0003] In traditional embedded devices, the power-on self-test usually only detects memory or specific hardware, and does not consider the impact of other components on the system, especially safety-related electronic devices. Generally, the traditional power-on self-check method adopts a simple method and does not consider the detection coverag...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/22
Inventor 孙军峰王澜耿进龙崔丹张磊徐军汪明新
Owner CASCO SIGNAL
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