Transistors with isolation regions
A technology of transistors and isolation regions, which is applied in semiconductor devices, electrical solid state devices, semiconductor/solid state device manufacturing, etc., and can solve problems such as blocking
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[0019] refer to Figure 2-5 , describes a transistor device that has a lower channel charge density and / or lower channel conductivity in the gate region of the device than in the access region of the device, and thus has a reduced short-circuit current I max , while still maintaining low on-resistance. Transistor 1 comprises isolation regions 20 , 21 and 22 between source 14 and drain 15 . Isolation regions can be constructed to reduce or minimize the maximum channel current (short circuit current) I max In order to increase or maximize the short-circuit survival time of the transistor 1 , the allowable low on-resistance can be maintained at the same time. Alternatively, the isolation structures or regions may be configured to collect holes generated in the transistor 1 . The isolation area can realize the above two functions at the same time. Transistors can be lateral devices, III-N devices, field effect transistors, enhancement mode devices (threshold voltage >0V), depl...
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